Semiconductor device
A multilayered semiconductor device including a substrate including n-type or p-type doped silicon carbide (SiC), an epitaxial oxide layer above the substrate, and a metal layer above the epitaxial oxide layer. In some cases, the epitaxial oxide layer includes n-type conductivity and the substrate is p-type doped, and the substrate and the epitaxial oxide layer form a p/n junction. In some cases, the device can further include an epitaxial transition layer between the substrate and the epitaxial oxide layer, where the epitaxial transition layer includes an n-type doping density that is at least an order of magnitude greater than an n-type doping density of the epitaxial oxide layer. In some cases, the substrate can be a composite substrate including a surface layer including single crystal SiC on a polycrystalline SiC layer. In some cases, a second metal layer is in contact with the substrate.
1. A multilayered semiconductor device comprising:
a substrate comprising n-type doped silicon carbide (SiC);
an epitaxial transition layer comprising a first semiconductor oxide material or SiC, wherein the epitaxial transition layer is on a surface of the substrate;
an epitaxial oxide layer comprising the first semiconductor oxide material, wherein the epitaxial oxide layer is in contact with the epitaxial transition layer; and
a metal layer above the epitaxial oxide layer,
wherein the epitaxial transition layer comprises an n-type doping density that is at least an order of magnitude greater than an n-type doping density of the epitaxial oxide layer, and
wherein the epitaxial transition layer further comprises a variable n-type doping density that varies in a growth direction that is approximately perpendicular to a top surface of the substrate.
2. The multilayered semiconductor device of claim 1 , wherein the first semiconductor oxide material comprises Ga 2 O 3 .
3. The multilayered semiconductor device of claim 1 , wherein the metal layer comprises a high work function metal such that the metal layer and the epitaxial oxide layer form a Schottky barrier junction.
4. The multilayered semiconductor device of claim 3 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the metal layer, wherein the epitaxial intermediate layer comprises a second semiconductor oxide material with a different composition than the first semiconductor oxide material, wherein the metal layer, the epitaxial intermediate layer, and the epitaxial oxide layer form the Schottky barrier junction.
5. The multilayered semiconductor device of claim 4 , wherein the first semiconductor oxide material comprises Ga 2 O 3 , and wherein the epitaxial intermediate layer comprises (Al x Ga 1-x ) 2 O 3 where 0≤x≤1.
6. The multilayered semiconductor device of claim 1 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the metal layer, wherein the epitaxial intermediate layer has a p-type conductivity, the epitaxial oxide layer has an n-type conductivity, and the epitaxial intermediate layer and the epitaxial oxide layer form a p/n junction.
7. The multilayered semiconductor device of claim 1 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the metal layer, wherein the epitaxial intermediate layer has a has a narrower bandgap than the epitaxial oxide layer.
8. The multilayered semiconductor device of claim 1 , wherein the n-type doping density of the epitaxial transition layer is different than an n-type doping density of the substrate.
9. The multilayered semiconductor device of claim 1 , wherein the substrate comprises a miscut surface with a miscut angle ranging from 1 to 10 degrees.
10. The multilayered semiconductor device of claim 1 , wherein the substrate is a composite substrate comprising a surface layer comprising single crystal SiC on a polycrystalline SiC layer.
11. A multilayered semiconductor device comprising:
a substrate comprising n-type doped silicon carbide (SiC);
an epitaxial transition layer comprising a first semiconductor oxide material or SiC, wherein the epitaxial transition layer is on a surface of the substrate;
an epitaxial oxide layer comprising the first semiconductor oxide material, wherein the epitaxial oxide layer is in contact with the epitaxial transition layer; and
a metal layer above the epitaxial oxide layer,
wherein the epitaxial transition layer comprises a p-type doping density that is at least an order of magnitude greater than an n-type doping density of the epitaxial oxide layer, and
wherein the epitaxial transition layer further comprises a variable p-type doping density that varies in a growth direction that is approximately perpendicular to a top surface of the substrate.
12. The multilayered semiconductor device of claim 11 , wherein the metal layer comprises a high work function metal such that the metal layer and the epitaxial oxide layer form a Schottky barrier junction.
13. The multilayered semiconductor device of claim 12 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the metal layer, wherein the epitaxial intermediate layer comprises a second semiconductor oxide material with a different composition than the first semiconductor oxide material, wherein the metal layer, the epitaxial intermediate layer, and the epitaxial oxide layer form the Schottky barrier junction.
14. The multilayered semiconductor device of claim 13 , wherein the first semiconductor oxide material comprises Ga 2 O 3 , and wherein the epitaxial intermediate layer comprises (Al x Ga 1-x ) 2 O 3 where 0<x≤1.
15. The multilayered semiconductor device of claim 11 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the metal layer, wherein the epitaxial intermediate layer has a p-type conductivity, the epitaxial oxide layer has an n-type conductivity, and the epitaxial intermediate layer and the epitaxial oxide layer form a p/n junction.
16. The multilayered semiconductor device of claim 11 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the metal layer, wherein the epitaxial intermediate layer has a narrower bandgap than the epitaxial oxide layer.
17. The multilayered semiconductor device of claim 11 , wherein the substrate comprises a miscut surface with a miscut angle ranging from 1 to 10 degrees.
18. The multilayered semiconductor device of claim 11 , wherein the substrate is a composite substrate comprising a surface layer comprising single crystal SiC on a polycrystalline SiC layer.
19. A multilayered semiconductor device comprising:
a substrate comprising p-type doped silicon carbide (SiC);
an epitaxial oxide layer comprising a first semiconductor oxide material, wherein the epitaxial oxide layer is above the substrate with respect to a growth direction, wherein the epitaxial oxide layer comprises n-type conductivity such that the substrate and the epitaxial oxide layer form a p/n junction;
a first metal layer above the epitaxial oxide layer with respect to the growth direction;
a second metal layer in contact with the substrate; and
an epitaxial transition layer between the substrate and the epitaxial oxide layer, wherein the epitaxial transition layer comprises a semiconductor oxide material or SiC,
wherein the epitaxial oxide layer, the epitaxial transition layer, or the epitaxial oxide layer and the epitaxial transition layer, comprise a variable doping density with respect to the growth direction.
20. The multilayered semiconductor device of claim 19 , wherein the first semiconductor oxide material comprises Ga 2 O 3 .
21. The multilayered semiconductor device of claim 19 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the first metal layer, wherein the epitaxial intermediate layer comprises an n-type doping concentration at least an order of magnitude greater than the n-type doping concentration of the epitaxial oxide layer, and wherein the first metal layer is in contact with the epitaxial intermediate layer.
22. The multilayered semiconductor device of claim 19 , wherein the first metal layer comprises a high work function metal such that the first metal layer and the epitaxial oxide layer form a Schottky barrier junction.
23. The multilayered semiconductor device of claim 22 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the first metal layer, wherein the epitaxial intermediate layer has a wider bandgap than the epitaxial oxide layer, wherein the first metal layer, the epitaxial intermediate layer, and the epitaxial oxide layer form the Schottky barrier junction.
24. The multilayered semiconductor device of claim 23 , wherein the first semiconductor oxide material comprises Ga 2 O 3 , and wherein the epitaxial intermediate layer comprises (Al x Ga 1-x ) 2 O 3 where 0≤x≤1.
25. The multilayered semiconductor device of claim 19 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the first metal layer, wherein the epitaxial intermediate layer comprises a second semiconductor oxide material with a p-type conductivity, and the epitaxial intermediate layer and the epitaxial oxide layer form a second p/n junction.
26. The multilayered semiconductor device of claim 25 , wherein the first semiconductor oxide material comprises Ga 2 O 3 , and wherein the second semiconductor oxide material comprises NiO, Ni z Ga 2(1-z) O 3-2z where 0≤z≤1, NiGa 2 O 4 , Mg x Ga 2(1-x) O 3-2x wherein 0≤x≤1, (Ni z1 Mg x1 Zn 1-x1-z1 )(Al y Ga 1-y1 ) 2 O 4 where 0≤(x1,y1,z1)≤1, (Mg x2 Ni 1-x2 ) z2 (Al y2 Ga 1-y2 ) 2(1-z2) O 3-2z2 , where 0≤x2≤1, 0≤y2≤1, and 0≤z2≤1, (Mg x3 Zn 1-x3 ) z3 (Al y3 Ga 1-y3 ) 2(1-z3) O 3-2z3 , where 0≤x3≤1, 0≤y3≤1, and 0≤z3≤1, (Zn x4 Ni 1-x4 ) z4 (Al y4 Ga 1-y4 ) 2(1-z4) O 3-2z4 , where 0≤x4≤1, 0≤y4≤1, and 0≤z4≤1.
27. The multilayered semiconductor device of claim 25 , wherein the first semiconductor oxide material comprises Ga 2 O 3 , and wherein the second semiconductor oxide material comprises Ga 2 O 3 with a polar Pna21 crystal symmetry and a polarization axis aligned such that the p-type conductivity is induced by the polar Pna21 crystal symmetry of the second semiconductor oxide material.
28. The multilayered semiconductor device of claim 19 , further comprising an epitaxial intermediate layer between the epitaxial oxide layer and the first metal layer, wherein the epitaxial intermediate layer has a has a narrower bandgap than the epitaxial oxide layer.
29. The multilayered semiconductor device of claim 19 , wherein the substrate is a composite substrate comprising a surface layer comprising p-type doped single crystal SiC on a polycrystalline SiC layer.