Display device with consistent luminance at different refresh rates
The subject matter described in this disclosure includes a pixel circuit with an LED and a driving transistor having a drain terminal that is connected to the LED to supply power to the LED. The pixel circuit also includes a second transistor that is connected between the LED and an initialization voltage line, the second transistor having a gate terminal connected to a scan line. The pixel circuit also includes a third transistor that is connected between the LED and the initialization voltage line in series with the second transistor, the third transistor having a gate terminal connected to a reset line. The pixel circuit is configured so that activating the scan line at a first frequency and activating the reset line at half the first frequency causes the LED to be initialized every other time the scan line is activated.
1. A pixel circuit, including:
an LED with an anode terminal and a cathode terminal;
a driving transistor including a drain terminal, the drain terminal of the driving transistor being connected to the anode terminal of the LED to supply power to the LED;
a second transistor that is connected between an initialization voltage line that specifies an initialization voltage and the anode terminal of the LED, the second transistor having a gate terminal that is connected to a scan line; and
a third transistor that is connected between the initialization voltage line and the anode terminal of the LED in series with the second transistor, the third transistor having a gate terminal that is connected to a reset line,
wherein the pixel circuit is configured so that activating the scan line at a first frequency and activating the reset line at a second frequency that is half the first frequency causes the pixel circuit to initialize the LED based on the initialization voltage every other time the scan line is activated.
2. The pixel circuit of claim 1 , comprising:
a fourth transistor connected between the initialization voltage line and a gate terminal of the driving transistor, the fourth transistor having a gate terminal that is connected to a second scan line that is different from the scan line.
3. The pixel circuit of claim 1 , wherein the pixel circuit is configured so that: activating the scan line at the first frequency includes periodically turning the second transistor on at the first frequency;
activating the reset line at the second frequency includes periodically turning the third transistor on at the second frequency; and
the pixel circuit initializes the LED responsive to the pixel circuit turning the second transistor on and the third transistor on simultaneously.
4. The pixel circuit of claim 3 , wherein the pixel circuit is configured so that:
activating the scan line at the first frequency includes periodically turning on the second transistor for a first period of time;
activating the reset line at the second frequency includes periodically turning on the third transistor for a second period of time;
the first period of time overlaps with the second period of time; and
the second period of time is greater than the first period of time.
5. The pixel circuit of claim 1 , wherein the pixel circuit is configured so that, at a first display device refresh frequency that has a first frame time, the pixel circuit alternates between a first frame type and a second frame type,
the first frame type includes the scan line being activated concurrently with the reset line being activated, causing both the LED and the gate terminal of the driving transistor to be initialized based on the initialization voltage, and
the second frame type includes the scan line being activated concurrently with the reset line being not activated, causing the LED to be left without being initialized and the gate terminal of the driving transistor to be initialized based on the initialization voltage.
6. The pixel circuit of claim 5 , wherein during the second frame type a voltage across the LED drops to a threshold voltage of the LED based on power to the LED being interrupted.
7. The pixel circuit of claim 5 , wherein the pixel circuit is configured so that, at a second display device refresh frequency that is half the first display device refresh frequency, the pixel circuit repeatedly presents a third frame type that includes a first frame portion and a second frame portion,
the first frame portion includes the scan line being activated concurrently with the reset line being activated, causing both the LED to be initialized based on the initialization voltage and the gate terminal of the driving transistor to be initialized based on the initialization voltage; and
the second frame portion includes the scan line being not activated concurrently with power to the LED being interrupted, causing the LED to turn off without being initialized and the gate terminal of the driving transistor being left without being initialized.
8. The pixel circuit of claim 7 , wherein:
the first frame portion represents a first half of the third frame type; and
the second frame portion represents a second half of the third frame type.
9. The pixel circuit of claim 7 , wherein the second frame portion, during which the scan line is not activated concurrently with power to the LED being interrupted, causes a voltage across the LED to drop to a threshold voltage of the LED and the gate terminal of the driving transistor to maintain a previously-programmed voltage value.
10. The pixel circuit of claim 7 , wherein:
the first display device refresh frequency corresponds to 120 Hz; and
the second display device refresh frequency corresponds to 60 Hz.