Techniques for laser alignment in photonic integrated circuits
Techniques for efficient alignment of a semiconductor laser in a Photonic Integrated Circuit (PIC) are disclosed. In some embodiments, a photonic integrated circuit (PIC) may include a semiconductor laser that includes a laser mating surface, and a substrate that includes a substrate mating surface. A shape of the laser mating surface and a shape of the substrate mating surface may be configured to align the semiconductor laser with the substrate in three dimensions.
1 . A semiconductor laser, comprising:
a laser mating surface, the laser mating surface comprising a tapered mating surface and a laser facet, the laser facet being completely set back to a position between where the tapered mating surface is narrower and the tapered mating surface is wider.
2 . The semiconductor laser of claim 1 , further comprising:
an upper region; and
a lower region, the lower region comprising the laser mating surface.
3 . The semiconductor laser of claim 2 , wherein the upper region and the lower region comprise an active region of the semiconductor laser.
4 . The semiconductor laser of claim 1 , further comprising:
a first electrode for the semiconductor laser; and
a second electrode for the semiconductor laser.
5 . The semiconductor laser of claim 1 , wherein the tapered mating surface comprises an angular tapered mating surface.
6 . The semiconductor laser of claim 1 , wherein the tapered mating surface comprises a clipped angular mating surface.
7 . The semiconductor laser of claim 1 , wherein:
the tapered mating surface comprises a first angular tapered mating surface and a second angular tapered mating surface; and
the laser facet is positioned between the first angular tapered mating surface and the second angular tapered mating surface.
8 . The semiconductor laser of claim 7 , wherein:
the laser facet is completely set back to a position between where the first angular tapered mating surface is narrower and the first angular tapered mating surface is wider; and
the laser facet is completely set back to a position between where the second angular tapered mating surface is narrower and the second angular tapered mating surface is wider.
9 . The semiconductor laser of claim 7 , wherein the first angular tapered mating surface comprises a first clipped angular tapered mating surface and the second angular tapered mating surface comprises a second clipped angular tapered mating surface.
10 . The semiconductor laser of claim 1 , further comprising a side surface, the side surface comprising a ruler patterned the side surface.
11 . A photonic integrated circuit (PIC), comprising:
a semiconductor laser, the semiconductor laser comprising a laser mating surface, the laser mating surface comprising a tapered laser mating surface and a laser facet for exiting a laser beam, the laser facet being positioned between where the tapered laser mating surface is narrower and the tapered laser mating surface is wider; and
a substrate, the substrate comprising a tapered substrate mating surface and a waveguide for receiving the laser beam, a leading edge of the waveguide being completely set back to a position between where the tapered substrate mating surface is narrower and the tapered substrate mating surface is wider.
12 . The PIC of claim 11 , wherein the tapered substrate mating surface comprises a curved edge.
13 . The PIC of claim 11 , wherein the tapered laser mating surface comprises an angular tapered laser mating surface.
14 . The PIC of claim 11 , wherein the tapered laser mating surface comprises a clipped angular laser mating surface.
15 . The PIC of claim 11 , wherein:
the tapered laser mating surface comprises a first angular tapered laser mating surface and a second angular tapered laser mating surface; and
the tapered substrate mating surface comprises a first angular tapered substrate mating surface and a second angular tapered substrate mating surface.
16 . The PIC of claim 15 , wherein the laser facet is positioned between the first angular tapered laser mating surface and the second angular tapered laser mating surface.
17 . The PIC of claim 15 , wherein the waveguide is positioned between the first angular tapered substrate mating surface and the second angular tapered substrate mating surface.
18 . The PIC of claim 11 , wherein a leading edge of the laser facet is angled and a leading edge of the waveguide is angled.
19 . The PIC of claim 11 , wherein the substrate comprises a recessed landing area.
20 . The PIC of claim 19 , wherein the recessed landing area further comprises:
a contact pad; and
a run-off area for solder on the contact pad.
21 . A photonic integrated circuit (PIC) substrate, comprising:
a tapered substrate mating surface; and
a waveguide for receiving a laser beam from a semiconductor laser, a leading edge of the waveguide being completely set back to a position between where the tapered substrate mating surface is narrower and the tapered substrate mating surface is wider.