IP Library › Granted Patent US 12,333,140
Granted Patent B2
US 12,333,140 · App. 18/335,390 · Granted Jun 17, 2025

Memory system and method

Inventor: Yifan Tang (Kanagawa, JP)
Assignee: Kioxia Corporation
G06F3/0604G06F3/0631G06F3/0634G06F3/0679
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Quick Facts
Patent No.
US 12,333,140
App. No.
18/335,390
Granted
Jun 17, 2025
Kind
B2
Abstract

According to one embodiment, a memory system comprises a first memory including a nonvolatile memory cell array, a second memory configured to operate at higher speed than the first memory, and a memory controller. The memory controller executes, in response to a write command from a host, data transfer from the host to the second memory, a data-in operation, and a program operation, with respect to first data instructed to be written by the write command. After the data-in operation for the first data is started and before the data-in operation is completed, the memory controller transfers the first data from the second memory to the host in response to a read command to read the first data. After the program operation for the first data is started, the memory controller transfers the first data from the first memory to the host in response to the read command.

Claims (114)

1. A memory system connectable to a host, the system comprising:

a first memory including a nonvolatile memory cell array;

a second memory configured to operate at higher speed than the first memory; and

a memory controller configured to:

in response to a write command from the host, with respect to first data instructed to be written by the write command,

execute a first operation that is data transfer from the host to the second memory;

execute a second operation that is data transfer from the second memory to the first memory; and

cause the first memory to execute a third operation of writing data transferred by the second operation to the memory cell array, wherein the memory controller is further configured to:

execute switching between a first mode and a second mode in response to an access pattern from the host; and

in response to a read command from the host to read the first data,

in the first mode:

before a first timing that is a timing at which the second operation for the first data is started, transfer, from the second memory to the host, second data that is the first data stored in the second memory by the first operation, and after the first timing, acquire, from the first memory, third data that is the first data written to the memory cell array by the third operation, and transfer the third data to the host; and

in the second mode:

before a second timing that is a timing at which the second operation for the first data is completed, transfer the second data from the second memory to the host, and

after a third timing that is a timing at which the third operation for the first data is started, acquire the third data from the first memory and transfer the third data to the host.

2. The memory system according to claim 1 , wherein

the memory controller is further configured to:

allocate a first region in the second memory in response to the write command;

store the first data in the first region in the first operation for the first data;

transfer the first data from the first region to the first memory in the second operation for the first data; and

deallocate the first region in response to the second operation for the first data being completed.

3. The memory system according to claim 1 , wherein

the memory controller is further configured to:

upon determining that a frequency of writes from the host is higher than a threshold, select the first mode; and

upon determining that the frequency of the writes from the host is lower than the threshold, select the second mode.

4. The memory system according to claim 1 , wherein

the memory controller is further configured to:

upon determining that a frequency of reads from the host is lower than a threshold, select the first mode; and

upon determining that the frequency of the reads from the host is higher than the threshold, select the second mode.

5. The memory system according to claim 1 , further comprising:

a third memory; and

a fourth memory, wherein

the memory controller is further configured to:

store first management information in the third memory;

store second management information in the fourth memory;

allocate a first region in the second memory in response to the write command;

store the first data in the first region in the first operation for the first data;

transfer the first data from the first region to the first memory in the second operation for the first data; and

deallocate the first region in response to the second operation for the first data being completed, and

the memory controller is further configured to:

specify a first address indicating a position of the first data in a logical address space based on the write command;

in the first mode,

register a correspondence relationship between the first address and identification information of the first region in the first management information when allocating the first region,

before the second operation, determine a second address indicating a position in the memory cell array and register a correspondence relationship between the identification information and the second address in the second management information, and

in response to the third operation being completed, cancel the correspondence relationship between the identification information and the second address registered in the second management information, and update the correspondence relationship between the first address and the identification information registered in the first management information to a correspondence relationship between the first address and the second address; and

in the second mode,

register the correspondence relationship between the first address and the identification information in the first management information when allocating the first region,

determine the second address before the second operation,

register the correspondence relationship between the identification information and the second address in the second management information in response to the second operation being competed, and

in response to the third operation being completed, cancel the correspondence relationship between the identification information and the second address registered in the second management information, and update the correspondence relationship between the first address and the identification information registered in the first management information to the correspondence relationship between the first address and the second address.

6. The memory system according to claim 5 , wherein

the memory controller is further configured to:

transfer, upon determining that the first address is associated with the identification information in the first management information but the identification information is not associated with the second address in the second management information, the second data from the second memory to the host in response to the read command;

acquire, upon determining that the first address is associated with the identification information in the first management information and the identification information is associated with the second address in the second management information, the third data from the first memory and transfer the third data to the host, in response to the read command; and

acquire, upon determining that the first address is associated with the second address in the first management information, the third data from the first memory and transfer the third data to the host, in response to the read command.

7. The memory system according to claim 6 , wherein

the memory controller is further configured to acquire, upon determining that the first address is associated with the identification information in the first management information, and the identification information is associated with the second address in the second management information, the third data from the first memory and transfer the third data to the host, after waiting for the third operation for the first data to be completed, in response to the read command.

8. The memory system according to claim 5 , wherein

the memory controller is further configured to allocate, in response to deallocating the first region, an area of the second memory to which the first region has been allocated as a second region for storing fourth data different from the first data.

9. The memory system according to claim 8 , wherein

the memory controller is further configured to:

remain registering the correspondence relationship between the first address and the identification information in the first management information after deallocating the first region; and

update the correspondence relationship between the first address and the identification information registered in the first management information to the correspondence relationship between the first address and the second address, in response to the third operation being completed.

10. A method of controlling a memory system, the memory system including a first memory and a second memory, the first memory including a nonvolatile memory cell array, the second memory being configured to operate at higher speed than the first memory, the method comprising:

in response to a write command from a host, with respect to first data instructed to be written by the write command,

executing a first operation that is data transfer from the host to the second memory;

executing a second operation that is data transfer from the second memory to the first memory; and

causing the first memory to execute a third operation of writing data transferred by the second operation to the memory cell array;

executing switching between a first mode and a second mode in response to an access pattern from the host; and

in response to a read command from the host to read the first data,

in the first mode:

before a first timing that is a timing at which the second operation for the first data is started, transferring, from the second memory to the host, second data that is the first data stored in the second memory by the first operation, and after the first timing, acquiring, from the first memory, third data that is the first data written to the memory cell array by the third operation, and transferring the third data to the host; and

in the second mode:

before a second timing that is a timing at which the second operation for the first data is completed, transferring the second data from the second memory to the host, and

after a third timing that is a timing at which the third operation for the first data is started, acquiring the third data, from the first memory and transferring the third data to the host.

11. The method according to claim 10 , further comprising:

allocating a first region in the second memory in response to the write command;

storing the first data in the first region in the first operation for the first data;

transferring the first data from the first region to the first memory in the second operation for the first data; and

deallocating the first region in response to the second operation for the first data being completed.

12. The method according to claim 10 , further comprising:

upon determining that a frequency of writes from the host is higher than a threshold, selecting the first mode; and

upon determining that the frequency of the writes from the host is lower than the threshold, selecting the second mode.

13. The method according to claim 10 , further comprising:

upon determining that a frequency of reads from the host is lower than a threshold, selecting the first mode; and

upon determining that the frequency of the reads from the host is higher than the threshold, selecting the second mode.

14. The method according to claim 10 , wherein the memory system further includes a third memory and a fourth memory, and the method further comprises:

storing first management information in the third memory;

storing second management information in the fourth memory;

allocating a first region in the second memory in response to the write command;

storing the first data in the first region in the first operation for the first data;

transferring the first data from the first region to the first memory in the second operation for the first data;

deallocating the first region in response to the second operation for the first data being completed; and

specifying a first address indicating a position of the first data in a logical address space based on the write command;

in the first mode,

registering a correspondence relationship between the first address and identification information of the first region in the first management information when allocating the first region,

before the second operation, determining a second address indicating a position in the memory cell array and registering a correspondence relationship between the identification information and the second address in the second management information, and

in response to the third operation being completed, canceling the correspondence relationship between the identification information and the second address registered in the second management information and updating the correspondence relationship between the first address and the identification information registered in the first management information to a correspondence relationship between the first address and the second address; and

in the second mode,

registering the correspondence relationship between the first address and the identification information in the first management information when allocating the first region,

determining the second address before the second operation,

registering the correspondence relationship between the identification information and the second address in the second management information in response to the second operation being competed, and

in response to the third operation being competed, canceling the correspondence relationship between the identification information and the second address registered in the second management information and updating the correspondence relationship between the first address and the identification information registered in the first management information to the correspondence relationship between the first address and the second address.

15. The method according to claim 14 , further comprising:

transferring, upon determining that the first address is associated with the identification information in the first management information but the identification information is not associated with the second address in the second management information, the second data from the second memory to the host in response to the read command;

acquiring, upon determining that the first address is associated with the identification information in the first management information and the identification information is associated with the second address in the second management information, the third data from the first memory and transferring the third data to the host, in response to the read command; and

acquiring, upon determining that the first address is associated with the second address in the first management information, the third data from the first memory and transferring the third data to the host, in response to the read command.

16. The method according to claim 15 , further comprising:

acquiring, upon determining that the first address is associated with the identification information in the first management information and the identification information is associated with the second address in the second management information, the third data from the first memory and transferring the third data to the host, after waiting for the third operation for the first data to be completed, in response to the read command.

17. The method according to claim 14 , further comprising:

allocating, in response to deallocating the first region, an area of the second memory to which the first region has been allocated as a second region for storing fourth data different from the first data.

18. The method according to claim 17 , further comprising:

remaining registering the correspondence relationship between the first address and the identification information in the first management information after deallocating the first region; and

updating the correspondence relationship between the first address and the identification information registered in the first management information to the correspondence relationship between the first address and the second address, in response to the third operation being completed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2023
From: TANG, YIFAN
To: KIOXIA CORPORATION
Reel/Frame 064691/0882 →
Priority Claims (1)
JP 2022-149133 · Sep 20, 2022 · national
Continuity (1)
Related Publication 20240094904A1 · Mar 21, 2024
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