Storage device for migrating data based on random read workload and operating method of the same
Provided herein may be a storage device and a method of operating the same. A memory controller for controlling a memory device including a plurality of memory blocks having improved read performance may include a random read workload control unit configured to control a state of a random read workload such that the random read workload is in any one of a set state and a clear state depending on a random read count obtained by counting a number of random read requests that are inputted from an external host; and a random read processing unit configured to retrieve a physical address corresponding to a logical address of the respective random read requests depending on the state of the random read workload.
1. A storage device, comprising:
a buffer memory configured to temporarily store data from a host;
non-volatile memory chips; and
a memory controller configured to receive a plurality of host requests, to count a number of random read requests among the plurality of host requests, to set a read workload status to a set state in response to the number of random read requests exceeding a reference count, and to control the buffer memory and the non-volatile memory chips to migrate the data from the buffer memory to the non-volatile memory chips based on the number of random read requests,
wherein the memory controller includes:
a logical to physical mapping table configured to store information of a logical address of data stored in a closed block and a corresponding physical address of the closed block; and
a read processor configured to retrieve a physical address corresponding to a logical address of a currently provided read request by searching the logical to physical mapping table which stores the information when the read workload status is the set status.
2. The storage device of claim 1 , wherein the memory controller flushes the data from the buffer memory to the non-volatile memory chips based on the read workload status.
3. The storage device of claim 1 , wherein a length of a logical address provided along with the random read requests is less than a predetermined value.
4. The storage device of claim 2 , wherein the memory controller sets the read workload status to a clear state in response to a sequential read request from the host.
5. The storage device of claim 4 , wherein a length of a logical address provided along with the sequential read request exceeds a predetermined value.
6. The storage device of claim 1 , wherein the memory controller comprises:
a physical to logical mapping table configured to store information of a physical address of an open block and a corresponding logical address of data stored in the open block.
7. The storage device of claim 6 , wherein the open block has an available data storage space that remains.
8. The storage device of claim 6 , wherein the closed block has no remaining physical addresses to be allocated.
9. The storage device of claim 6 , wherein the buffer memory stores a logical address corresponding to the data temporarily stored in the buffer memory.
10. The storage device of claim 6 , wherein the read processor is further configured to retrieve the physical address corresponding to the logical address of the currently provided read request by searching in an order of the buffer memory, the physical to logical mapping table, and the logical to physical mapping table.
11. A memory controller comprising:
a random read workload controller configured to control a state of a random read workload to a clear state in response to a sequential read request from an external host; and
a read processor configured to retrieve a physical address corresponding to a logical address of a read request depending on the state of the random read workload.
12. The memory controller according to claim 11 , wherein the random read workload controller comprises:
a random read detector configured to determine whether a request inputted from the external host is a random read request;
a random read counter configured to generate a random read count by counting a number of random read requests; and
a random read workload setter configured to change the state of the random read workload to a set state from the clear state in response to the random read count exceeding a reference count.
13. The memory controller according to claim 12 , wherein a length of a logical address provided along with the random read request is less than a predetermined value.
14. The memory controller according to claim 11 , wherein a length of a logical address provided along with the sequential read request exceeds a predetermined value.
15. The memory controller according to claim 11 , further comprising:
a write cache buffer configured to temporarily store inputted data in response to a write request from the external host;
a physical to logical mapping table configured to store information of a physical address of an open block and a corresponding logical address of data stored in the open block; and
a logical to physical mapping table configured to store information of a logical address of data stored in a closed block and a corresponding physical address of the closed block.
16. The memory controller according to claim 15 , wherein the open block has an available data storage space that remains.
17. The memory controller according to claim 15 , wherein the closed block has no remaining physical addresses to be allocated.