IP Library Granted Patent US 12,489,474
Granted Patent B2
US 12,489,474 · App. 18/346,665 · Granted Dec 2, 2025

RF transceiver

Inventors: Konstantinos Manetakis (Neuchâtel, CH); Anjana Dissanayake (Neuchâtel, CH)
Assignee: CSEM Centre Suisse d'Electronique et de Microtechnique SA—Recherche et Développement
H04B1/04H04B1/0078H04B2001/0408H04B1/44
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,489,474
App. No.
18/346,665
Granted
Dec 2, 2025
Kind
B2
Abstract

An RF transceiver ( 100 ) which has a single RF antenna port ( 20 ) for a receive path, and two transmit paths, a balun ( 10 ) including a primary winding ( 11 ) and a secondary winding ( 12 ), the latter coupled to the RF antenna port ( 20 ), the receive path including a low noise amplifier (LNA), the first transmit path including a high power amplifier (HPA), switches (S 1 , S 2 ), and capacitors (C 1 , C 2 ), the second transmit path including a low power amplifier (LPA) and a switch (S 3 ).

Claims (37)

1 . A RF transceiver comprising:

a single RF antenna port for a receive path, a first transmit path and a second transmit path

a balun comprising a primary winding and a secondary winding, wherein a first terminal of the secondary winding is coupled to the RF antenna port,

the receive path, which comprises

a low noise amplifier, comprising an input terminal coupled to a second terminal of the secondary winding,

the first transmit path, which comprises

a high power amplifier, comprising differential output terminals coupled to the primary winding, and

a first and second switches between each differential output terminal of the high power amplifier and a ground potential,

a third capacitor between the first switch and the ground potential or between the first switch and a first differential output terminal of the high power amplifier,

a fourth capacitor between the second switch and the ground potential or between the second switch and a second differential output terminal of the high power amplifier,

the second transmit path, which comprises

a low power amplifier having an output terminal coupled to the RF antenna port, and

a third switch between the output terminal of the low power amplifier and the ground potential,

wherein the RF transceiver is configured to be in

a high power transmit mode when the first, second and third switches are in a closed position, wherein in the high power transmit mode the first transmit path is arranged to provide to the RF antenna port a high power RF signal,

a low power transmit mode when the first, second and third switches are in an open position, wherein in the low power transmit mode the second transmit path is arranged to provide to the RF antenna port a low power RF signal,

a receive mode when the first, second and third switches are in an open position, wherein in the receive mode the receive path is arranged to receive from the RF antenna port a third RF signal.

2 . The RF transceiver of claim 1 , comprising

a fourth switch between the second terminal of the secondary winding and the ground potential,

a first matching capacitor between the first terminal of the secondary winding and the output terminal of the low power amplifier,

wherein

the first transmit path is configured to provide the first RF signal to the RF antenna port when the fourth switch is in a closed position,

the second transmit path is configured to provide the second RF signal to the RF antenna port when the fourth switch is in a closed position,

the receive path is configured to receive the third RF signal from the RF antenna port when the fourth switch is in an open position.

3 . The RF transceiver of claim 1 , comprising

a first matching capacitor between the first terminal of the secondary winding and the RF antenna port,

wherein the output terminal of the low power amplifier is coupled to the second terminal of the secondary winding.

4 . The RF transceiver of claim 1 , comprising

a second matching capacitor, between the input terminal of the low noise amplifier and the second terminal of the secondary winding.

5 . The RF transceiver of claim 1 , wherein at least one of the high power amplifier and the low power amplifier is a non-linear class power amplifier.

6 . The RF transceiver of claim 5 , wherein at least one of the high power amplifier and the low power amplifier is a class D amplifier.

7 . The RF transceiver of claim 6 , wherein the high power amplifier is an inverse class D amplifier.

8 . The RF transceiver of claim 1 , wherein the low power amplifier is a single-ended low power amplifier.

9 . The RF transceiver of claim 5 , wherein at least one of the high power amplifier and the low power amplifier comprises transistors realised with a FDSOI process, the RF transceiver comprising a backgate control module in a final stage of said at least one of the high power amplifier and the low power amplifier, for controlling a backgate voltage of said transistors.

10 . The RF transceiver of claim 1 , wherein at least one of the high power amplifier and the low power amplifier comprises a DC-DC converter module, for controlling, a DC power supply of a final stage of said at least one of the high power amplifier and the low power amplifier.

11 . The RF transceiver of claim 1 , wherein at least one of the high power amplifier and the low power amplifier comprises a duty cycle control module, for controlling a duty cycle of a phase path in a final stage of said at least one of the high power amplifier and the low power amplifier.

12 . The RF transceiver of claim 1 , comprising a module for driving only a part of the high power amplifier, in order to optimize the efficiency of the RF transceiver.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2023
From: MANETAKIS, KONSTANTINOS; DISSANAYAKE, ANJANA
To: CSEM CENTRE SUISSE D'ELECTRONIQUE ET DE MICROTECHNIQUE SA - RECHERCHE ET DÉVELOPPEMENT
Reel/Frame 064152/0434 →
Priority Claims (2)
EP 22183057 · Jul 5, 2022 · regional
EP 22186485 · Jul 22, 2022 · regional
Continuity (1)
Related Publication 20240014835A1 · Jan 11, 2024
References Cited (11)
US 8044540B2 · Lee et al. · 2011 [cited by examiner]
US 9871488B2 · Lin · 2018 [cited by examiner]
US 10333579B1 · Emira et al. · 2019 [cited by examiner]
US 10778276B2 · Kim et al. · 2020 [cited by examiner]
US 11171683B2 · Elsayed et al. · 2021 [cited by applicant]
US 12249966B2 · Lo et al. · 2025 [cited by examiner]
US 20170093032A1 · Khoury et al. · 2017 [cited by examiner]
US 20210111748A1 · Elsayed et al. · 2021 [cited by examiner]
US 20230049925A1 · Lo et al. · 2023 [cited by examiner]
WO WO2012154840 · 2012 [cited by applicant]
European Search Report in European Application No. EP22186485.3, mailed Jan. 16, 2023 in 10 pages. [cited by applicant]