Methods and circuits for diode-based display backplanes and electronic displays
View Patent ↗An electronic display includes a plurality of pixels, each pixel including a data line, first and second selection lines and a common electrode. A control circuit element includes first and second diode-like elements coupled between the first and second selection lines and a charging node. A charging capacitive element is coupled between the charging node and the date line. An active pixel element is coupled between the charging node and the common electrode. The common electrode can overly the entire electronic display and is a suitable transparent conductive material. Each of the first and second diode-like elements includes an amorphous metal non-linear resistor. The active pixel element may include one of liquid crystal display circuitry, light emitting diode circuitry, and electrophoretic circuitry.
1. A device comprising,
an amorphous metal non-linear resistor including:
an amorphous metal layer extending in a first direction;
a insulating layer on the first amorphous metal layer;
a first electrode extending in a second direction that is transverse to the first direction, the first electrode overlapping the first amorphous metal layer;
a second electrode extending in the second direction, the second electrode overlapping the first amorphous metal layer;
a storage capacitor adjacent to the first amorphous metal layer;
a select line extending in the second direction;
a data line extending in the first direction;
a common electrode on the amorphous metal non-linear resistor; and
an electrophoretic material layer.
2. The device of claim 1 , further including a plurality of amorphous metal non-linear resistors, the amorphous metal non-linear resistor being one of the plurality of amorphous metal non-linear resistors.
3. The device of claim 1 , wherein the common electrode comprises indium-tin-oxide.
4. The device of claim 1 , further including a plurality of select lines, the select line being one of the plurality of select lines.
5. The device of claim 1 , wherein the storage capacitor includes a lower electrode, a dielectric on the lower electrode, and an upper electrode on the dielectric.
6. A method comprising,
forming an amorphous metal non-linear resistor including:
forming an amorphous metal layer extending in a first direction;
forming a insulating layer on the first amorphous metal layer;
forming a first electrode extending in a second direction that is transverse to the first direction, the first electrode overlapping the first amorphous metal layer;
forming a second electrode extending in the second direction, the second electrode overlapping the first amorphous metal layer;
forming a storage capacitor adjacent to the first amorphous metal layer;
forming a select line extending in the second direction;
forming a data line extending in the first direction;
forming a common electrode on the amorphous metal non-linear resistor; and
forming an electrophoretic material layer.
7. The method of claim 6 , further including forming a plurality of amorphous metal non-linear resistors, the amorphous metal non-linear resistor being one of the plurality of amorphous metal non-linear resistors.
8. The method of claim 6 , wherein the common electrode comprises indium-tin-oxide.
9. The method of claim 6 , further including forming a plurality of select lines, the select line being one of the plurality of select lines.
10. The method of claim 6 , wherein the storage capacitor includes a lower electrode, a dielectric on the lower electrode, and an upper electrode on the dielectric.
11. The method of claim 6 , wherein the first electrode is formed while the select line is formed.
12. The method of claim 10 , wherein the upper electrode is formed while the data line is formed.
13. A device comprising,
an amorphous metal non-linear resistor including:
an amorphous metal layer extending in a first direction;
a insulating layer on the first amorphous metal layer;
a first electrode extending in a second direction that is transverse to the first direction, the first electrode overlapping the first amorphous metal layer;
a second electrode extending in the second direction, the second electrode overlapping the first amorphous metal layer;
a storage capacitor adjacent to the first amorphous metal layer;
a select line extending in the second direction;
a data line extending in the first direction; and
a common line, anode pad, and cathode pad.
14. The device of claim 13 , further including a plurality of amorphous metal non-linear resistors, the amorphous metal non-linear resistor being one of the plurality of amorphous metal non-linear resistors.
15. The device of claim 13 , further including a plurality of select lines, the select line being one of the plurality of select lines.
16. The device of claim 13 , wherein the storage capacitor includes a lower electrode, a dielectric on the lower electrode, and an upper electrode on the dielectric.
17. A device, comprising:
an amorphous metal layer;
a insulator layer on the amorphous metal layer;
a first electrode on the insulator layer;
a select line;
a first dielectric layer;
a storage capacitor lower electrode;
a second dielectric layer;
a storage capacitor upper electrode;
a data line; and
a common line, anode pad, and cathode pad.
18. The device of claim 17 , wherein the amorphous metal layer extends in a first direction, the insulator layer extends in the first direction, and the first electrode extends in a second direction that is transverse to the first direction.
19. The device of claim 18 , wherein the select line extends in a second direction that is transverse to the first direction.
20. The device of claim 19 , wherein the data line extends in the first direction.
21. The device of claim 17 , comprising a plurality of amorphous metal non-linear resistors that include the amorphous metal layer, the insulator layer, and the first electrode.
22. The device of claim 17 , wherein the common electrode comprises indium-tin-oxide.
23. The device of claim 17 , further including:
an inorganic barrier layer on the storage capacitor upper electrode; and
an organic planarization layer on the inorganic barrier layer.