Fault protected signal splitter apparatus
A system is disclosed herein. The system includes a splitter board. The splitter board includes a microprocessor, a converter, and a bypass relay. The converter includes analog-to-digital circuitry and digital-to-analog circuitry. The bypass relay is configurable between a first state and a second state. In the first state, the bypass relay is configured to direct an input signal to the converter. The converter converts the input signal to a converted input signal and splits the converted input signal into a first portion and a second portion. The first portion is directed to the microprocessor. The second portion is directed to an output port of the splitter board for downstream processes. In the second state, the bypass relay is configured to cause the input signal to bypass the converter. The bypass relay directs the input signal to the output port of the splitter board for the downstream processes.
1. A system comprising:
a mother board comprising:
an input relay configurable between a first position and a second position;
an input pad in communication with the input relay;
a switch configurable between an open position and a closed position;
an output relay configurable between a first position and a second position
an output pad in communication with the output relay; and
a calibration circuit configured to calibrate the mother board, such that an input signal to the mother board via the input pad matches an output signal output via the output pad.
2. The system of claim 1 , wherein the calibration circuit is positioned upstream of the output relay.
3. The system of claim 1 , wherein the calibration circuit is positioned upstream of the input relay.
4. The system of claim 1 , wherein the calibration circuit calibrates the mother board using an input reference signal.
5. The system of claim 4 , wherein the calibration circuit records output signals generated by the input signal.
6. The system of claim 5 , further comprising:
a daughter board configured to connect to the mother board, wherein, when the daughter board is connected to the mother board, the input relay switches from the open position to the closed position, such that power is supplied to the input relay and the output relay causing the input relay to switch from the first position to the second position and the output relay from the first position to the second position,
wherein in the second position, the input pad provides an input signal from the mother board to the daughter board and the output pad receives an output signal from the daughter board.
7. The system of claim 6 , wherein the mother board is calibrated using the calibration circuit before the daughter board is connected to the mother board.
8. The system of claim 7 , wherein the mother board is calibrated again using the input reference signal when the mother board is connected to the daughter board.
9. The system of claim 8 , wherein the output signals are generated using the input reference signal when the daughter board is connected.
10. A system comprising:
a mother board comprising:
an input relay configurable between a first position and a second position;
an input pad in communication with the input relay;
an output relay configurable between a first position and a second position
an output pad in communication with the output relay; and
a calibration circuit configured to calibrate the mother board, such that an input signal to the mother board via the input pad matches an output signal output via the output pad; and
a daughter board configured to connect to the mother board, wherein, when the daughter board is connected to the mother board, the input relay switches from the first position to the second position, such that power is supplied to the input relay and the output relay causing the input relay to switch from the first position to the second position and the output relay from the first position to the second position,
wherein in the second position, the input pad provides an input signal from the mother board to the daughter board and the output pad receives an output signal from the daughter board.
11. The system of claim 10 , wherein the calibration circuit is positioned upstream of the output relay.
12. The system of claim 10 , wherein the calibration circuit is positioned upstream of the input relay.
13. The system of claim 10 , wherein the calibration circuit calibrates the mother board using an input reference signal.
14. The system of claim 13 , wherein the calibration circuit records output signals generated by the input signal.
15. The system of claim 14 , wherein the output signals are generated using the input reference signal when the daughter board is connected.
16. The system of claim 13 , wherein the mother board is calibrated using the calibration circuit before the daughter board is connected to the mother board.
17. The system of claim 16 , wherein the mother board is calibrated again using the input reference signal when the mother board is connected to the daughter board.
18. A method of calibrating a mother board and daughter board system, comprising:
disconnecting a mother board from a daughter board;
applying a reference signal to the mother board;
identifying a output signal corresponding to the reference signal; and
calibrating the mother board based on a deviation between the reference signal and the output signal.
19. The method of claim 18 , further comprising:
after calibrating the mother board without the daughter board, reconnecting the daughter board to the mother board; and
recalibrating the mother board using the reference signal.
20. The method of claim 19 , wherein recalibrating the mother board using the reference signal comprises:
providing the reference signal to the daughter board via an input pad of the mother board; and
receiving a second output signal from the daughter board via an output pad of the mother board.