Gamma voltage control circuit, display apparatus including the same and electronic apparatus including the same
A gamma voltage control circuit includes a first amplifier and a second amplifier. The first amplifier is configured to generate a first primitive reference voltage based on a panel power voltage applied to a display panel. The second amplifier is configured to generate a first reference voltage based on the first primitive reference voltage, the panel power voltage and an internal power voltage.
1. A gamma voltage control circuit comprising:
a first amplifier configured to generate a first primitive reference voltage based on a panel power voltage applied to a display panel;
a second amplifier configured to generate a first reference voltage based on the first primitive reference voltage, the panel power voltage and an internal power voltage, and output the first reference voltage to a gamma reference voltage generator as a high reference voltage;
a resistor string including a first end configured to receive the panel power voltage; and
a first decoder connected to the resistor string and the first amplifier,
wherein the first amplifier is a first low dropout regulator.
2. The gamma voltage control circuit of claim 1 , wherein the first amplifier comprises:
a non-inverting input terminal connected to the first decoder;
an inverting input terminal connected to a first node;
an output terminal configured to output the first primitive reference voltage;
a first resistor connected between the output terminal and the first node; and
a second resistor connected between the first node and a ground.
3. The gamma voltage control circuit of claim 1 , wherein the second amplifier is a first differential amplifier.
4. The gamma voltage control circuit of claim 1 , wherein the second amplifier comprises:
a non-inverting input terminal configured to receive the first primitive reference voltage and the panel power voltage;
an inverting input terminal configured to receive the internal power voltage; and
an output terminal configured to output the first reference voltage.
5. The gamma voltage control circuit of claim 4 , further comprising:
a third resistor including a first end portion connected to an output terminal of the first amplifier and a second end portion connected to the non-inverting input terminal of the second amplifier,
a fourth resistor including a first end portion configured to receive the panel power voltage and a second end portion connected to the non-inverting input terminal of the second amplifier;
a fifth resistor including a first end portion configured to receive the internal power voltage and a second end portion connected to the inverting input terminal of the second amplifier; and
a sixth resistor including a first end portion connected to the inverting input terminal of the second amplifier and a second end portion connected to the output terminal of the second amplifier.
6. The gamma voltage control circuit of claim 4 , wherein when the first reference voltage is VAREG, the first primitive reference voltage is VREG, the panel power voltage is VELVDD and the internal power voltage is VNELVDD, VAREG=VREG+VELVDD−VNELVDD is satisfied.
7. The gamma voltage control circuit of claim 1 , further comprising:
a third amplifier configured to generate a second primitive reference voltage based on the panel power voltage; and
a fourth amplifier configured to generate a second reference voltage based on the second primitive reference voltage, the panel power voltage and the internal power voltage.
8. The gamma voltage control circuit of claim 7 , further comprising a second decoder connected between the resistor string and the third amplifier.
9. The gamma voltage control circuit of claim 8 , wherein the third amplifier is a second low dropout regulator.
10. The gamma voltage control circuit of claim 8 , wherein the third amplifier comprises:
a non-inverting input terminal connected to the second decoder;
an inverting input terminal connected to a second node;
an output terminal configured to output the second primitive reference voltage;
a seventh resistor connected between the output terminal and the second node; and
an eighth resistor connected between the second node and a ground.
11. The gamma voltage control circuit of claim 7 , wherein the fourth amplifier is a second differential amplifier.
12. The gamma voltage control circuit of claim 7 , wherein the fourth amplifier comprises:
a non-inverting input terminal configured to receive the second primitive reference voltage and the panel power voltage;
an inverting input terminal configured to receive the internal power voltage; and
an output terminal configured to output the second reference voltage.
13. The gamma voltage control circuit of claim 1 , further comprising a fifth amplifier configured to generate the internal power voltage based on the panel power voltage.
14. The gamma voltage control circuit of claim 13 , further comprising a third decoder connected between the resistor string and the fifth amplifier.
15. A gamma voltage control circuit comprising:
a first amplifier configured to generate an internal power voltage based on a panel power voltage applied to a display panel;
a second amplifier configured to generate a first reference voltage based on a first primitive reference voltage, the panel power voltage and the internal power voltage, and output the first reference voltage to a gamma reference voltage generator as a high reference voltage;
a third amplifier configured to generate a second reference voltage based on a second primitive reference voltage, the panel power voltage and the internal power voltage, and output the second reference voltage to the gamma reference voltage generator as a low reference voltage;
a resistor string including a first end configured to receive the panel power voltage and a second end configured to receive an internal reference voltage; and
a decoder connected between the resistor string and the first amplifier,
wherein the first amplifier comprises:
a non-inverting input terminal configured to receive a bias voltage;
an inverting input terminal connected to a third node;
an output terminal configured to output the internal power voltage;
a first resistor connected between the decoder and the third node; and
a second resistor connected between the inverting input terminal and the output terminal.
16. The gamma voltage control circuit of claim 15 , wherein the second amplifier comprises:
a non-inverting input terminal configured to receive the first primitive reference voltage and the panel power voltage;
an inverting input terminal configured to receive the internal power voltage; and
an output terminal configured to output the first reference voltage.
17. The gamma voltage control circuit of claim 16 , wherein the third amplifier comprises:
a non-inverting input terminal configured to receive the second primitive reference voltage and the panel power voltage;
an inverting input terminal configured to receive the internal power voltage; and
an output terminal configured to output the second reference voltage.
18. A display apparatus comprising:
a display panel;
a power voltage generator configured to output a panel power voltage to the display panel;
a gate driver configured to output a gate signal to the display panel;
a data driver configured to output a data voltage to the display panel;
a gamma reference voltage generator configured to output a gamma reference voltage to the data driver; and
a gamma voltage control circuit configured to output a first reference voltage and a second reference voltage to the gamma reference voltage generator,
wherein the gamma voltage control circuit comprises:
a first amplifier configured to generate a first primitive reference voltage based on a panel power voltage; and
a second amplifier configured to generate the first reference voltage based on the first primitive reference voltage, the panel power voltage and an internal power voltage,
wherein the first reference voltage is a high reference voltage for the gamma reference voltage generator,
wherein the gamma voltage control circuit further comprises:
a third amplifier configured to generate a second primitive reference voltage based on the panel power voltage; and
a fourth amplifier configured to generate the second reference voltage based on the second primitive reference voltage, the panel power voltage and the internal power voltage.
19. The display apparatus of claim 18 , wherein the data driver and the gamma reference voltage generator are integrally formed.
20. An electronic apparatus comprising:
a display panel;
a power voltage generator configured to output a panel power voltage to the display panel;
a gate driver configured to output a gate signal to the display panel;
a data driver configured to output a data voltage to the display panel;
a gamma reference voltage generator configured to output a gamma reference voltage to the data driver;
a gamma voltage control circuit configured to output a first reference voltage and a second reference voltage to the gamma reference voltage generator;
a driving controller configured to control the gate driver and the data driver; and
a processor configured to output input image data and an input control signal to the driving controller,
wherein the gamma voltage control circuit comprises:
a first amplifier configured to generate a first primitive reference voltage based on a panel power voltage;
a second amplifier configured to generate the first reference voltage based on the first primitive reference voltage, the panel power voltage and an internal power voltage;
a resistor string including a first end configured to receive the panel power voltage; and
a first decoder connected to the resistor string and the first amplifier,
wherein the first reference voltage is a high reference voltage for the gamma reference voltage generator, and
wherein the first amplifier is a first low dropout regulator.