Granted Patent B2

US 12,255,528 · App. 18/378,910 · Granted Mar 18, 2025

Inventor: Paul Wilkinson Dent (Pittsboro, NC)

Assignee: Koolbridge Solar, Inc.

H02M1/32H02J3/00H02J3/007H02J3/38H02J3/388H02J7/0068H02J7/35H02J9/061H02M1/36H02M7/537H02M7/53871H02H3/16H02J2300/00H02J2300/22Y02A30/00Y02B10/10Y02E10/56

Abstract

Claims (44)

1. A DC to AC inverter, comprising:

circuitry configured to define a plurality of different voltage levels, wherein each level is defined by lower and upper voltage values;

a jittering controller configured to jitter between the lower and upper voltage values in each level to generate a number N of preliminary AC waveforms, each having mean values between the lower and upper voltage values within each level;

one or more AC output filters, each configured to receive a preliminary AC waveform and to remove the jittering and provide a smooth output AC waveform; and

positive and negative DC input terminals to receive DC power, and wherein the inverter is configured to cause the positive and negative DC input terminals to vary alike in voltage according to a common mode waveform while maintaining a substantially constant differential voltage between them, the variation in voltage having substantially the same common waveform on both the positive and negative DC input terminals and transitioning between a greatest negative and a greatest positive value at a frequency equal to N times the output AC waveform frequency.

2. The DC to AC inverter of claim 1 wherein, for all levels, the lower and upper voltage values nominally differ by a predetermined voltage.

3. The DC to AC inverter of claim 1 wherein an ordered succession of the levels defines a coarse multilevel approximation to the output AC waveform.

4. The DC to AC inverter of claim 1 wherein the circuitry comprises:

one or more capacitors, each configured to be maintained at a desired floating voltage;

a plurality of semiconductor switches associated with the capacitors; and

a controller configured to control the semiconductor switches at successive times to select among the capacitors to selectively contribute their respective voltages, the inverse of their respective voltages, or no voltage, whereby the sum of these voltages produces the lower and upper voltage values of the different voltage levels.

5. The DC to AC inverter of claim 1 wherein the jittering controller is configured to use one of pulse width modulation, bit density modulation, and delta-sigma modulation.

6. The DC to AC inverter of claim 1 wherein the AC output filter is a low pass filter comprising a series inductor and a shunt capacitor.

7. The DC to AC inverter of claim 1 wherein the DC to AC inverter is configured to receive DC input power from a floating DC source.

8. The DC to AC inverter of claim 7 wherein the floating DC source is derived from photovoltaic panels.

9. The DC to AC inverter of claim 4 wherein the output AC waveform is a sine wave at a desired power line frequency.

10. The DC to AC inverter of claim 9 wherein the controller is configured to control predetermined ones of the semiconductor switches to actuate at the desired power line frequency.

11. The DC to AC inverter of claim 1 , where N=1 for single or split phase output, and N=3 for three-phase output.

12. The DC to AC inverter of claim 1 further comprising a common mode filter configured to suppress high frequency components of the common mode waveform.

13. A method of generating an AC waveform from DC power, comprising:

defining a plurality of different voltage levels, wherein each level is defined by lower and upper voltage values;

jittering between the lower and upper voltage values in each level to generate a number N of preliminary AC waveforms, each having mean values between the lower and upper voltage values within each level;

filtering the preliminary AC waveforms to remove the jittering and produce [a] smooth output AC waveforms; and

causing positive and negative DC input terminals that are to receive the DC power to vary alike in voltage according to a common mode waveform while maintaining a substantially constant differential voltage between them, the variation in voltage having substantially the same common mode waveform on both the positive and negative DC input terminals and transitioning between a greatest negative and a greatest positive value at a frequency equal to N times the output AC waveform frequency.

14. The method of claim 13 wherein the output AC waveform is a desired root mean square voltage or current.

15. The method of claim 13 wherein, for all levels, the lower and upper voltage values nominally differ by a predetermined voltage.

16. The method of claim 15 wherein an ordered succession of the levels defines a coarse multilevel approximation to the output AC waveform.

17. The method of claim 13 wherein generating a preliminary AC waveform having mean values between the lower and upper voltage values within each level comprises:

maintaining each of one or more capacitors at a desired floating voltage; and

controlling a plurality of semiconductor switches associated with the capacitors to, at successive times, select among the capacitors to selectively contribute their respective voltages, the inverse of their respective voltages, or no voltage, whereby the sum of these voltages produces the lower and upper voltage values of the different voltage levels.

18. The method of claim 13 wherein jittering between the lower and upper voltage values in each different voltage level comprises using one of pulse width modulation, bit density modulation, and delta-sigma modulation.

19. The method of claim 13 wherein filtering the preliminary AC waveform comprises applying the preliminary AC waveform to a low pass filter comprising a series inductor and a shunt capacitor.

20. The method of claim 13 wherein DC input power is provided by a floating DC source.

21. The method of claim 20 wherein the floating DC source is derived from photovoltaic panels.

22. The method of claim 13 wherein the smooth output AC waveform is a sine wave at a desired power line frequency.

23. The method of claim 17 wherein controlling a plurality of semiconductor switches comprises controlling the switches such that predetermined ones of the switches operate at the desired power line frequency.

24. The method of claim 13 where N=1 for single or split phase output, and N=3 for three-phase output.

25. The method of claim 13 further comprising filtering the common mode waveform to suppress high frequency components.

26. A DC to AC inverter configured to convert DC power from a floating DC power source to a smooth sinewave AC output voltage or current waveform having a desired magnitude, phase, and frequency, comprising:

a positive and a negative input terminal for receiving DC power from said floating DC power source at a single predetermined voltage;

circuitry connected to said positive and negative input terminals configured to define a plurality of more than two different output voltage levels, wherein each level is defined by a lower and an upper voltage value;

a jittering controller configured to jitter between the lower and upper voltage values of each level to generate a preliminary AC waveform having mean values between or equal to the lower and upper voltage values of each level; and

an AC output filter configured to receive the preliminary AC waveform and to remove the jittering and provide said smooth sinewave AC output voltage or current waveform having said desired magnitude, phase, and frequency;

a pair of AC output terminals to output said smooth AC output voltage or current waveform, wherein one terminal of said pair is designated as a ground, neutral, or reference potential terminal, and wherein said DC to AC inverter is further configured to cause a common mode voltage waveform to appear equally on said positive and negative DC input terminals relative to said ground, neutral, or reference potential terminal which transitions between a greatest positive value and a greatest negative value at a transition frequency equal to said AC output frequency and wherein a common mode filter is configured to smooth said transitions so as to produce a benign waveform that minimizes the export of potential radio frequency interference.

Assignments (2)

Continuity (6)

References Cited (250)