Inrush current control
An inrush current control circuit selectively short-circuit bypasses an inrush current limiting resistor (R 1 ) of a power supply that includes a switching transistor (Q 1 ) having a control terminal (gate or base) driven in dependence on a pulse width modulated (PWM) drive signal. The inrush current control circuit includes a bypass transistor (Q 3 ), a first resistor (R 3 ), a capacitor (C 2 ), a second resistor (R 2 ) and a diode (D 3 ), wherein an anode terminal of the diode (D 3 ) is connected to one of the terminals of the switching transistor (Q 1 ) of the power supply.
1. An inrush current control circuit to selectively short-circuit bypass an inrush current limiting resistor (R 1 ) of a power supply that includes a switching transistor (Q 1 ), wherein the switching transistor (Q 1 ) includes a control terminal (gate or base) driven in dependence on a pulse width modulated (PWM) drive signal, a first current path terminal (source or emitter) and a second current path terminal (collector or drain), and wherein inrush current control circuit comprises:
a bypass transistor (Q 3 ) including a control terminal (gate or base), a first current path terminal (source or emitter) and a second current path terminal (collector or drain), with a current path between the first and second current path terminals, wherein the current path is connected in parallel with the inrush current limiting resistor (R 1 );
a first resistor (R 3 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a capacitor (C 2 ) having a first capacitor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second capacitor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a second resistor (R 2 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal; and
a diode (D 3 ) having a cathode terminal connected to the second resistor terminal of the second resistor (R 2 ), and having an anode terminal connected to the control terminal (gate or base) of the switching transistor (Q 1 ) of the power supply.
2. The inrush current control circuit of claim 1 , wherein after the power supply is plugged into a power outlet, turned on or hot-plugged, the control terminal (gate or base) of the switching transistor (Q 1 ) begins to receive the PWM drive signal and is selectively turned on and off by the PWM signal; and wherein when the switching transistor (Q 1 ) is selectively turned on by the PWM drive signal, a voltage at the control terminal of the switching transistor (Q 1 ) will charge up a voltage at the control terminal of the bypass transistor (Q 3 ) through the diode (D 3 ) and the second resistor (R 2 ), which will cause the bypass transistor (Q 3 ) to switch from being turned off to being turned on, thereby causing the current path of the bypass transistor (Q 3 ) to provide a short-circuit bypass of the inrush current limiting resistor (R 1 ) at a turn-on time constant after the power supply is plugged into a power outlet, turned on or hot-plugged.
3. The inrush current control circuit of claim 2 , wherein the diode (D 3 ) keeps the voltage at the control terminal (gate or base) of the bypass transistor (Q 3 ) sufficiently high to keep the bypass transistor (Q 3 ) turned on during periods when the PWM drive signal causes the switching transistor (Q 1 ) to be selectively turned off.
4. The inrush current control circuit of claim 2 , wherein the turn-on time constant is dependent on the second resistor (R 2 ) and the capacitor (C 2 ).
5. An inrush current control circuit to selectively short-circuit bypass an inrush current limiting resistor (R 1 ) of a power supply that includes a switching transistor (Q 1 ), wherein the switching transistor (Q 1 ) includes a control terminal (gate or base) driven in dependence on a pulse width modulated (PWM) drive signal, a first current path terminal (source or emitter) and a second current path terminal (collector or drain), and wherein inrush current control circuit comprises:
a bypass transistor (Q 3 ) including a control terminal (gate or base), a first current path terminal (source or emitter) and a second current path terminal (collector or drain), with a current path between the first and second current path terminals, wherein the current path is connected in parallel with the inrush current limiting resistor (R 1 );
a first resistor (R 3 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a capacitor (C 2 ) having a first capacitor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second capacitor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a second resistor (R 2 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal; and
a diode (D 3 ) having a cathode terminal connected to the second resistor terminal of the second resistor (R 2 ), and having an anode terminal connected to the second current path terminal (collector or drain) of the switching transistor (Q 1 ) of the power supply;
wherein after the power supply is plugged into a power outlet, turned on or hot-plugged, the control terminal (gate or base) of the switching transistor (Q 1 ) begins to receive the PWM drive signal and is selectively turned on and off by the PWM signal; and
wherein when the switching transistor (Q 1 ) is selectively turned off by the PWM drive signal, a voltage at the cathode of the diode (D 3 ) will charge up a voltage at the control terminal of the bypass transistor (Q 3 ), which will cause the bypass transistor (Q 3 ) to switch from being turned off to being turned on, thereby causing the current path of the bypass transistor (Q 3 ) to provide a short-circuit bypass of the inrush current limiting resistor (R 1 ) at a turn-on time constant after the power supply is plugged into a power outlet, turned on or hot-plugged.
6. A power supply, comprising:
a full bridge rectifier;
an inrush current limiting resistor (R 1 ) connected between a positive (+) terminal of the full bridge rectifier and a high voltage line (VBUS);
a bulk capacitor (C 1 ) connected between the high voltage line (VBUS) and ground;
a switching transistor (Q 1 ) including a control terminal (gate or base) driven in dependence on a pulse width modulated (PWM) drive signal, a first current path terminal (source or emitter) and a second current path terminal (collector or drain); and
an inrush current control circuit to selectively short-circuit bypass the inrush current limiting resistor (R 1 );
wherein the inrush current control circuit comprises
a bypass transistor (Q 3 ) including a control terminal (gate or base), a first current path terminal (source or emitter) and a second current path terminal (collector or drain), with a current path between the first and second current path terminals, wherein the current path is connected in parallel with the inrush current limiting resistor (R 1 );
a first resistor (R 3 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a capacitor (C 2 ) having a first capacitor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second capacitor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a second resistor (R 2 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal; and
a diode (D 3 ) having a cathode terminal connected to the second resistor terminal of the second resistor (R 2 ), and having an anode terminal connected to the control terminal (gate or base) of the switching transistor (Q 1 ) of the power supply.
7. The power supply of claim 6 , wherein after the power supply is plugged into a power outlet, turned on or hot-plugged, the control terminal (gate or base) of the switching transistor (Q 1 ) begins to receive the PWM drive signal and is selectively turned on and off by the PWM signal, and wherein when the switching transistor (Q 1 ) is selectively turned on by the PWM drive signal, a voltage at the control terminal of the switching transistor (Q 1 ) will charge up a voltage at the control terminal of the bypass transistor (Q 3 ) through the diode (D 3 ) and the second resistor (R 2 ), which will cause the bypass transistor (Q 3 ) to switch from being turned off to being turned on, thereby causing the current path of the bypass transistor (Q 3 ) to provide a short-circuit bypass of the inrush current limiting resistor (R 1 ) at a turn-on time constant after the power supply is plugged into a power outlet, turned on or hot-plugged.
8. The power supply of claim 7 , wherein the diode (D 3 ) keeps the voltage at the control terminal (gate or base) of the bypass transistor (Q 3 ) sufficiently high to keep the bypass transistor (Q 3 ) turned on during periods when the PWM drive signal causes the switching transistor (Q 1 ) to be selectively turned off.
9. The power supply of claim 7 , wherein the turn-on time constant is dependent on the second resistor (R 2 ) and the capacitor (C 2 ).
10. A power supply, comprising:
a full bridge rectifier;
an inrush current limiting resistor (R 1 ) connected between a positive (+) terminal of the full bridge rectifier and a high voltage line (VBUS);
a bulk capacitor (C 1 ) connected between the high voltage line (VBUS) and ground;
a switching transistor (Q 1 ) including a control terminal (gate or base) driven in dependence on a pulse width modulated (PWM) drive signal, a first current path terminal (source or emitter) and a second current path terminal (collector or drain); and
an inrush current control circuit to selectively short-circuit bypass the inrush current limiting resistor (R 1 );
wherein the inrush current control circuit comprises
a bypass transistor (Q 3 ) including a control terminal (gate or base), a first current path terminal (source or emitter) and a second current path terminal (collector or drain), with a current path between the first and second current path terminals, wherein the current path is connected in parallel with the inrush current limiting resistor (R 1 );
a first resistor (R 3 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a capacitor (C 2 ) having a first capacitor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second capacitor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a second resistor (R 2 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal; and
a diode (D 3 ) having a cathode terminal connected to the second resistor terminal of the second resistor (R 2 ), and having an anode terminal connected to one of the terminals of the switching transistor (Q 1 ) of the power supply;
wherein the switching transistor (Q 1 ) comprises a high side switching transistor with its second current path terminal (collector or drain) connected to the high voltage line (VBUS).
11. A power supply, comprising:
a full bridge rectifier;
an inrush current limiting resistor (R 1 ) connected between a positive (+) terminal of the full bridge rectifier and a high voltage line (VBUS);
a bulk capacitor (C 1 ) connected between the high voltage line (VBUS) and ground;
a switching transistor (Q 1 ) including a control terminal (gate or base) driven in dependence on a pulse width modulated (PWM) drive signal, a first current path terminal (source or emitter) and a second current path terminal (collector or drain); and
an inrush current control circuit to selectively short-circuit bypass the inrush current limiting resistor (R 1 );
wherein the inrush current control circuit comprises
a bypass transistor (Q 3 ) including a control terminal (gate or base), a first current path terminal (source or emitter) and a second current path terminal (collector or drain), with a current path between the first and second current path terminals, wherein the current path is connected in parallel with the inrush current limiting resistor (R 1 );
a first resistor (R 3 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a capacitor (C 2 ) having a first capacitor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second capacitor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a second resistor (R 2 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal; and
a diode (D 3 ) having a cathode terminal connected to the second resistor terminal of the second resistor (R 2 ), and having an anode terminal connected to the second current path terminal (collector or drain) of the switching transistor (Q 1 ); and
a capacitor (C 4 ) connected between the high voltage line (VBUS) and the cathode of diode (D 3 );
wherein after the power supply is plugged into a power outlet, turned on or hot-plugged, the control terminal (gate or base) of the switching transistor (Q 1 ) begins to receive the PWM drive signal and is selectively turned on and off by the PWM signal; and
wherein when the switching transistor (Q 1 ) is selectively turned off by the PWM drive signal, a voltage at the anode of the diode (D 3 ) will charge up a voltage at the control terminal of the bypass transistor (Q 3 ), which will cause the bypass transistor (Q 3 ) to switch from being turned off to being turned on, thereby causing the current path of the bypass transistor (Q 3 ) to provide a short-circuit bypass of the inrush current limiting resistor (R 1 ) at a time constant after the power supply is plugged into a power outlet, turned on or hot-plugged.
12. A power supply, comprising:
a full bridge rectifier;
an inrush current limiting resistor (R 1 ) connected between a positive (+) terminal of the full bridge rectifier and a high voltage line (VBUS);
a bulk capacitor (C 1 ) connected between the high voltage line (VBUS) and ground;
a switching transistor (Q 1 ) including a control terminal (gate or base) driven in dependence on a pulse width modulated (PWM) drive signal, a first current path terminal (source or emitter) and a second current path terminal (collector or drain); and
an inrush current control circuit to selectively short-circuit bypass the inrush current limiting resistor (R 1 );
wherein the inrush current control circuit comprises
a bypass transistor (Q 3 ) including a control terminal (gate or base), a first current path terminal (source or emitter) and a second current path terminal (collector or drain), with a current path between the first and second current path terminals, wherein the current path is connected in parallel with the inrush current limiting resistor (R 1 );
a first resistor (R 3 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a capacitor (C 2 ) having a first capacitor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second capacitor terminal connected to the first current path terminal (source or emitter) of the bypass transistor (Q 3 );
a second resistor (R 2 ) having a first resistor terminal connected to the control terminal (gate or base) of the bypass transistor (Q 3 ), and having a second resistor terminal; and
a diode (D 3 ) having a cathode terminal connected to the second resistor terminal of the second resistor (R 2 ), and having an anode terminal connected to the second current path terminal (collector or drain) of the switching transistor (Q 1 ); and
wherein the switching transistor (Q 1 ) comprises a flyback switch of a flyback converter.
13. A method for use with a power supply including a switching transistor (Q 1 ) and an inrush current limiting resistor (R 1 ) that limits an inrush current when the power supply is plugged into a power outlet, turned on or hot-plugged, wherein the current limiting resistor (R 1 ) is connected in series with a high voltage line (VBUS) of the power supply, the method comprising:
(a) providing a current path of a bypass transistor (Q 3 ) in parallel with the inrush current limiting resistor (R 1 ), wherein the bypass transistor (Q 3 ) is turned off when the power supply is unplugged or turned off; and
(b) after the power supply is plugged into a power outlet, turned on or hot-plugged, charging up a voltage at a control terminal of the bypass transistor (Q 3 ) in dependence on a pulse width modulation (PWM) drive signal that drives a control terminal of the switching transistors (Q 1 ), to thereby turn on the bypass transistor (Q 3 ) and short-circuit bypass the inrush current limiting resistor (R 1 ).
14. The method of claim 13 , wherein step (b) includes charging up the voltage at the control terminal of the bypass transistor (Q 3 ) to a voltage that is greater than a voltage of the high voltage line (VBUS) of the power supply, to thereby turn on the bypass transistor (Q 3 ) and short-circuit bypass the inrush current limiting resistor (R 1 ).
15. A method for use with a power supply including an inrush current limiting resistor (R 1 ) that limits an inrush current when the power supply is plugged into a power outlet, turned on or hot-plugged, wherein the current limiting resistor (R 1 ) is connected in series with a high voltage line (VBUS) of the power supply, the method comprising:
(a) allowing the current limiting resistor to limit current in the power supply for a period of time following the power supply being plugged into a power outlet, turned on or hot-plugged;
(b) during at least a portion of the period of time following the power supply being plugged into a power outlet, turned on or hot-plugged, using a pulse width modulation (PWM) drive signal to drive a control terminal of a switching transistor (Q 1 ) of the power supply; and
(c) short-circuit bypassing the inrush current limiting resistor (R 1 ) after the period of time by charging up a voltage at a control terminal of a bypass transistor (Q 3 ) to a voltage that is greater than a voltage of the high voltage line (VBUS) of the power supply;
wherein the charging up the voltage at the control terminal of the bypass transistor (Q 3 ) is in dependence on the PWM drive signal that is used to drive the control terminal of the switching transistor (Q 1 ) of the power supply.