Semiconductor structure having air gap dielectric and method of preparing the same
The present disclosure provides a semiconductor structure including a base layer, a first conductive line disposed on the base layer, a first dielectric pillar disposed on the base layer, a second dielectric pillar disposed on the base layer, a first liner, and a second liner. The first conductive line is disposed between the first dielectric pillar and the second dielectric pillar. The first liner encloses a first air gap, and is disposed between the first dielectric pillar and the first conductive line. The second liner encloses a second air gap, and is disposed between the second dielectric pillar and the first conductive line.
1 . A method of preparing a semiconductor structure, comprising:
providing a substrate;
forming a first conductive line on the substrate;
forming a first dielectric pillar and a second dielectric pillar on the substrate, wherein the first conductive line is disposed between the first dielectric pillar and the second dielectric pillar; and
forming a first liner and a second liner on the substrate, wherein the first liner and the second liner enclose a first air gap and a second air gap, respectively, the first liner is disposed between the first dielectric pillar and the first conductive line, and the second liner is disposed between the second dielectric pillar and the first conductive line;
wherein forming the first liner and the second liner on the substrate comprises:
before forming the first dielectric pillar and the second dielectric pillar, depositing a spacer layer to cover the first conductive line and the substrate;
performing an etching process to remove a horizontal part of the spacer layer and partially remove a vertical part of the spacer layer to from a first spacer and a second spacer; and
performing a thermal treating process to transform the first spacer and the second spacer the first liner and the second liner, respectively.
2 . The method of claim 1 , further comprising:
forming a sealing layer over the first conductive line, the first dielectric pillar, the second dielectric pillar, the first liner, and the second liner.
3 . The method of claim 2 , wherein the sealing layer is formed by performing a spin-coating process.
4 . The method of claim 1 , wherein the first spacer and the second spacer comprise an energy removable material.
5 . The method of claim 4 , wherein during the thermal treating process, the energy removable material in a center of the first spacer and a center of the second spacer is removed to form the first air gap and the second air gap, respectively.
6 . The method of claim 5 , wherein a remaining portion of the first spacer and a remaining portion of the second spacer are transferred to the first liner and the second liner, respectively.
7 . The method of claim 1 , wherein the first liner has a uniform thickness.
8 . The method of claim 1 , wherein a top corner of the first air gap is lower than a top end of the first dielectric pillar.
9 . The method of claim 1 , a top corner of the first air gap is higher than a top end of the first dielectric pillar.
10 . The method of claim 1 , a top corner of the first air gap is leveled with a top end of the first dielectric pillar.
11 . The method of claim 1 , further comprising:
before forming the first conductive line, forming a plug in the substrate, wherein the plug is connected to the first conductive line.
12 . The method of claim 11 , wherein a width of the plug is less than a width of the first conductive line.
13 . The method of claim 1 , wherein the first dielectric pillar and the second dielectric pillar are formed by performing a spin-coating process.
14 . The method of claim 1 , wherein forming the first dielectric pillar and the second dielectric pillar on the substrate comprises:
filling a dielectric material on the substrate; and
drying the dielectric material to form the first dielectric pillar and the second dielectric pillar.
15 . The method of claim 1 , further comprising:
forming a second conductive line on the substrate;
forming a third dielectric pillar on the substrate, wherein the second conductive line is disposed between the second dielectric pillar and the third dielectric pillar; and
forming a third liner and a fourth liner on the substrate, wherein the third liner and the fourth liner enclose a third air gap and a fourth air gap, respectively, the third liner is disposed between the second dielectric pillar and the second conductive line, and the fourth liner is disposed between the third dielectric pillar and the second conductive line.