System and methods for achieving orthogonal control of non-orthogonal qubit parameters
Achieving orthogonal control of non-orthogonal qubit parameters of a logical qubit allows for increasing the length of a qubit chain thereby increasing the effective connectivity of the qubit chain. A hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit. By tuning a programmable parameter of the second qubit of a hybrid qubit, an effective programmable parameter of the hybrid qubit is adjusted without affecting another effective programmable parameter of the hybrid qubit thereby achieving orthogonal control of otherwise non-orthogonal qubit parameters. The length of the logical qubit may thus be increased by communicatively coupling a plurality of such hybrid qubits together.
1. A quantum processor comprising a plurality of hybrid qubits, wherein each hybrid qubit comprises:
a respective first qubit comprising:
a first qubit loop formed by a first closed superconducting current path; and
a compound Josephson junction that interrupts the first qubit loop;
a respective second qubit comprising:
a second qubit loop formed by a second closed superconducting current path;
a first Josephson junction that interrupts the second qubit loop; and
a compound Josephson junction that interrupts the second qubit loop;
a respective first programming subsystem communicatively coupleable to the compound Josephson junction of the respective first qubit;
a respective second programming subsystem communicatively coupleable to the first qubit loop of the respective first qubit; and
a respective third programming subsystem communicatively coupleable to the compound Josephson junction of the respective second qubit,
wherein the second qubit loop of the respective second qubit is galvanically coupled to the first qubit loop of the respective first qubit such that a portion of the second closed superconducting current path includes a portion of the first closed superconducting current path and is shared between the first and second closed superconducting current paths and wherein the first Josephson junction that interrupts the second qubit loop interrupts the portion of the second closed superconducting current path that is shared between the first and second closed superconducting current paths.
2. The quantum processor of claim 1 wherein each respective second qubit further comprises a second Josephson junction that interrupts the second qubit loop, and wherein the second Josephson junction that interrupts the second qubit loop interrupts a portion of the second closed superconducting current path that is not shared between the first and second closed superconducting current paths.
3. The quantum processor of claim 1 wherein each respective first qubit comprises a respective first programmable parameter that is controlled by the respective first programming subsystem communicatively coupleable to the compound Josephson junction of the respective first qubit and a respective second programmable parameter that is controlled by the respective second programming subsystem communicatively coupleable to the first qubit loop of the respective first qubit, and wherein, for each respective first qubit, the respective second programmable parameter at least partially depends on the respective first programmable parameter.
4. The quantum processor of claim 3 wherein each respective second qubit comprises a respective first programmable parameter that is controlled by the respective third programming subsystem communicatively coupleable to the compound Josephson junction of the respective second qubit, and wherein the respective second programmable parameter of each respective first qubit is independent of the respective first programmable parameter of the respective second qubit to which the respective first qubit is galvanically coupled, such that the respective first programmable parameter of each respective second qubit does not affect the respective second programmable parameter of the respective first qubit to which the respective second qubit is galvanically coupled.
5. The quantum processor of claim 3 wherein, for each respective first qubit, the respective first programmable parameter is a respective tunneling amplitude of the respective first qubit and the respective second programmable parameter is a respective persistent current in the first qubit loop of the respective first qubit, and wherein, for each respective second qubit, the respective first programmable parameter is a respective tunneling amplitude of the respective second qubit.
6. The quantum processor of claim 3 wherein each hybrid qubit further comprises:
a respective effective first programmable parameter that at least partially depends on the respective first programmable parameter of the respective first qubit and the respective first programmable parameter of the respective second qubit; and
a respective effective second programmable parameter that at least partially depends on the respective second programmable parameter of the respective first qubit, and
such that each hybrid qubit behaves as a respective logical qubit.
7. The quantum processor of claim 6 wherein, for each respective hybrid qubit, the respective effective first programmable parameter is an effective tunneling amplitude of the respective hybrid qubit and the respective effective second programmable parameter is an effective persistent current of the respective hybrid qubit.
8. The quantum processor of claim 1 , further comprising:
a plurality of coupling devices, wherein each respective coupling device is communicatively coupleable to a respective first qubit in a respective first hybrid qubit and a respective first qubit in a respective second hybrid qubit such that each respective coupling device provides communicative coupling between a respective pair of hybrid qubits.
9. The quantum processor of claim 8 wherein each respective coupling device comprises a respective loop of superconducting material interrupted by at least one respective Josephson junction, and wherein each respective coupling device is communicatively coupleable to a respective first qubit in a respective first hybrid qubit via galvanic or inductive coupling and to a respective first qubit in a respective second hybrid qubit via galvanic or inductive coupling.
10. The quantum processor of claim 9 wherein a first hybrid qubit and a second hybrid qubit are communicatively coupleable via a first coupling device to behave as a first logical qubit comprising:
an effective first programmable parameter that depends on the first programmable parameter of the first qubit in the first hybrid qubit, the first programmable parameter of the second qubit in the first hybrid qubit, the first programmable parameter of the first qubit in the second hybrid qubit, and the first programmable parameter of the second qubit in the second hybrid qubit; and
an effective second programmable parameter that depends on the second programmable parameter of the first qubit in the first hybrid qubit and the second programmable parameter of the first qubit in the second hybrid qubit,
wherein the effective first programmable parameter of the first logical qubit is independent of the effective second programmable parameter of the first logical qubit such that the effective first programmable parameter of the first logical qubit does not affect the effective second programmable parameter of the first logical qubit.