IP Library Granted Patent US 12,464,845
Granted Patent B2
US 12,464,845 · App. 18/435,461 · Granted Nov 4, 2025

Solid-state imaging element and electronic apparatus

Inventor: Atsushi Masagaki (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H10F39/807H10F39/80373H10F39/80377
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Quick Facts
Patent No.
US 12,464,845
App. No.
18/435,461
Granted
Nov 4, 2025
Kind
B2
Abstract

A solid-state imaging element of an embodiment of the present disclosure includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel transistor provided on one surface of the semiconductor substrate; and an element separation section provided in the semiconductor substrate and including a first element separation section and a second element separation section that have mutually different configurations, the element separation section defining an active region of the pixel transistor, in which the second element separation section has, on a side surface, a first semiconductor region and a second semiconductor region that have mutually different impurity concentrations in a depth direction of the second element separation section.

Claims (54)

1 . A light detecting device, comprising:

a semiconductor substrate including:

a first pixel;

a second pixel,

wherein the first pixel is adjacent to the second pixel;

a trench disposed through the semiconductor substrate; and

at least one transistor including a gate,

wherein the gate of the at least one transistor is disposed above one surface of the semiconductor substrate,

wherein the gate of the at least one transistor is shared by the first pixel and the second pixel,

wherein the gate of the at least one transistor is disposed directly above and covers a top portion of the trench in a cross-sectional view,

wherein the at least one transistor comprises a reset transistor, an amplification transistor, and a selection transistor, and

wherein at least one of the reset transistor, the amplification transistor, or the selection transistor is arranged in parallel with another of the reset transistor, the amplification transistor or the selection transistor provided between the first pixel and the second pixel.

2 . A light detecting device, comprising:

a semiconductor substrate including:

a first pixel;

a second pixel,

wherein the first pixel is adjacent to the second pixel;

a trench disposed through the semiconductor substrate; and

at least one transistor including a gate,

wherein the gate of the at least one transistor is disposed above one surface of the semiconductor substrate,

wherein the gate of the at least one transistor is shared by the first pixel and the second pixel,

wherein the gate of the at least one transistor is disposed directly above and covers a top portion of the trench in a cross-sectional view,

wherein the at least one transistor comprises a reset transistor, an amplification transistor, and a selection transistor, and

wherein each of the reset transistor, the amplification transistor, and the selection transistor is arranged in parallel between the first pixel and the second pixel.

3 . The light detecting device according to claim 1 , further comprising an element separation section provided for each of the first pixel and the second pixel, wherein the element separation section is disposed through the semiconductor substrate.

4 . The light detecting device according to claim 3 , wherein the trench extends beyond the element separation section within the semiconductor substrate.

5 . The light detecting device according to claim 3 , wherein the element separation section and the trench have mutually different depths within the semiconductor substrate.

6 . The light detecting device according to claim 3 , wherein the at least one transistor has a channel length that is defined by the element separation section and the trench.

7 . The light detecting device according to claim 3 , wherein the element separation section and the trench are formed by an insulating film or an impurity region.

8 . An electronic apparatus, comprising:

an optical system;

a light detecting device that receives light from the optical system, the light detecting device including:

a semiconductor substrate including:

a first pixel;

a second pixel, wherein the first pixel is adjacent to the second pixel;

a trench disposed through the semiconductor substrate; and

at least one transistor including a gate,

wherein the gate of the at least one transistor is disposed above one surface of the semiconductor substrate,

wherein the gate of the at least one transistor is shared by the first pixel and the second pixel,

wherein the gate of the at least one transistor is disposed directly above and covers at top portion of the trench in a cross-sectional view,

wherein the at least one transistor comprises a reset transistor, an amplification transistor, and a selection transistor, and

wherein at least one of the reset transistor, the amplification transistor, or the selection transistor is arranged in parallel with another of the reset transistor, the amplification transistor or the selection transistor provided between the first pixel and the second pixel; and

a controller that processes signals from the light detecting device.

9 . The electronic apparatus according to claim 8 , wherein each of the reset transistor, the amplification transistor, and the selection transistor is arranged in parallel between the first pixel and the second pixel.

10 . The electronic apparatus according to claim 8 , further comprising an element separation section provided for each of the first pixel and the second pixel, wherein the element separation section is disposed through the semiconductor substrate.

11 . The electronic apparatus according to claim 10 , wherein the trench extends beyond the element separation section within the semiconductor substrate.

12 . The electronic apparatus according to claim 10 , wherein the element separation section and the trench have mutually different depths within the semiconductor substrate.

13 . The electronic apparatus according to claim 10 , wherein the at least one transistor has a channel length that is defined by the element separation section and the trench.

14 . The electronic apparatus according to claim 10 , wherein the element separation section and the trench are formed by an insulating film or an impurity region.

15 . The light detecting device according to claim 2 , further comprising an element separation section provided for each of the first pixel and the second pixel, wherein the element separation section is disposed through the semiconductor substrate.

16 . The light detecting device according to claim 15 , wherein the trench extends beyond the element separation section within the semiconductor substrate.

17 . The light detecting device according to claim 15 , wherein the element separation section and the trench have mutually different depths within the semiconductor substrate.

18 . The light detecting device according to claim 15 , wherein the at least one transistor has a channel length that is defined by the element separation section and the trench.

19 . The light detecting device according to claim 15 , wherein the element separation section and the trench are formed by an insulating film or an impurity region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2024
From: MASAGAKI, ATSUSHI
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 066408/0416 →
Priority Claims (1)
JP 2018-133271 · Jul 13, 2018 · national
Continuity (2)
Continuation 17258213
Related Publication 20240186354A1 · Jun 6, 2024
References Cited (38)
US 7518172B2 · Moon · 2009 [cited by examiner]
US 8310003B2 · Kohyama · 2012 [cited by examiner]
US 20010012225A1 · Rhodes · 2001 [cited by examiner]
US 20050233494A1 · Hong · 2005 [cited by applicant]
US 20110180689A1 · Roy · 2011 [cited by examiner]
US 20110298078A1 · Ha et al. · 2011 [cited by applicant]
US 20130049082A1 · Kato · 2013 [cited by examiner]
US 20130221410A1 · Ahn · 2013 [cited by applicant]
US 20140054662A1 · Yanagita et al. · 2014 [cited by applicant]
US 20140151533A1 · Watanabe · 2014 [cited by examiner]
US 20140291793A1 · Tanaka · 2014 [cited by applicant]
US 20140362272A1 · Ahn et al. · 2014 [cited by applicant]
US 20150228684A1 · Yamashita · 2015 [cited by applicant]
US 20170069672A1 · Jin · 2017 [cited by examiner]
US 20180190692A1 · Choi et al. · 2018 [cited by applicant]
US 20190378864A1 · Innocent · 2019 [cited by examiner]
US 20210118925A1 · Zang · 2021 [cited by examiner]
US 20210167104A1 · Rao · 2021 [cited by examiner]
US 20210210532A1 · Hung · 2021 [cited by examiner]
US 20210272987A1 · Masagaki · 2021 [cited by examiner]
US 20210399029A1 · Ohura · 2021 [cited by examiner]
US 20230269503A1 · Oishi · 2023 [cited by examiner]
CN 101621067A · 2010 [cited by applicant]
CN 104078475A · 2014 [cited by applicant]
CN 104835826A · 2015 [cited by applicant]
JP 2008091702A · 2008 [cited by applicant]
JP 2011253963 · 2011 [cited by applicant]
JP 2014192348 · 2014 [cited by applicant]
JP 2017054890 · 2017 [cited by applicant]
KR 1020100004064 · 2010 [cited by applicant]
KR 1020170018206 · 2017 [cited by applicant]
KR 1020180076845 · 2018 [cited by applicant]
WO WO2012117931 · 2012 [cited by applicant]
International Search Report and Written Opinion for International (PCT) Patent Application No. PCT/JP2019/021956, dated Aug. 6, 2019, 5 pages. [cited by applicant]
Official Action for U.S. Appl. No. 17/258,213, dated Dec. 13, 2022, 11 pages. [cited by applicant]
Official Action for U.S. Appl. No. 17/258,213, dated May 15, 2023, 8 pages. Restriction Requirement. [cited by applicant]
Official Action for U.S. Appl. No. 17/258,213, dated Aug. 2, 2023, 11 pages. [cited by applicant]
Notice of Allowance for U.S. Appl. No. 17/258,213, dated Nov. 9, 2023, 5 pages. [cited by applicant]