IP Library Granted Patent US 12,211,828
Granted Patent B2
US 12,211,828 · App. 18/483,406 · Granted Jan 28, 2025

Light emitting diode device containing a positive photoresist insulating spacer and a conductive sidewall contact and method of making the same

Inventors: Willibrordus Gerardus Maria Van Den Hoek (Saratoga, CA); Tsun Yin Lau (Sunnyvale, CA); Cameron Danesh (Los Altos Hills, CA); Fariba Danesh (Los Altos Hills, CA)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L25/167H01L33/0025H01L33/06H01L33/08H01L33/12H01L33/24H01L33/32H01L33/405H01L33/56H01L33/62H01L2933/005H01L2933/0066
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Quick Facts
Patent No.
US 12,211,828
App. No.
18/483,406
Granted
Jan 28, 2025
Kind
B2
Abstract

A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes.

Claims (31)

1. A light emitting device comprising:

a backplane;

an array of light emitting diodes attached to a frontside of the backplane;

a positive tone, imageable dielectric material layer located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, wherein sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile such that a lateral extent of the light emitting diodes decreases with increasing vertical distance from a top surface of the light emitting diodes towards the frontside of the backplane; and

at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes,

wherein each light emitting diode of the array of light emitting diodes comprises an n-doped compound semiconductor substrate layer, an n-doped compound semiconductor region, an active region, a p-doped semiconductor region, and an anode contact that are sequentially stacked.

2. The light emitting device of claim 1 , wherein each light emitting diode of the array of light emitting diodes further comprises a reflective metal layer formed on a top surface of the anode contact.

3. The light emitting device of claim 2 , wherein each light emitting diode of the array of light emitting diodes further comprises a dielectric material layer between the reflective metal layer and the anode contact.

4. The light emitting device of claim 3 , wherein the reflective metal layer extends downward such that laterally surrounding the n-doped compound semiconductor region, and the n-doped compound semiconductor substrate layer.

5. The light emitting device of claim 1 , wherein the n-doped compound semiconductor region is a continuous planar semiconductor layer formed on the n-doped compound semiconductor substrate layer.

6. The light emitting device of claim 1 , wherein each light emitting diode of the array of light emitting diodes further comprises a mask layer between the n-doped compound semiconductor substrate layer and the n-doped compound semiconductor region.

7. The light emitting device of claim 6 , wherein the p-doped semiconductor region contacts the mask layer.

8. The light emitting device of claim 7 , wherein the p-doped semiconductor region contacts a periphery of the mask layer.

9. The light emitting device of claim 6 , wherein the n-doped compound semiconductor region comprises a faceted surface.

10. The light emitting device of claim 9 , wherein a portion of the active region is formed on the faceted surface.

11. The light emitting device of claim 1 , wherein the n-doped compound semiconductor region comprises microdiscs.

12. The light emitting device of claim 1 , wherein the n-doped compound semiconductor region comprises nanodisks.

13. The light emitting device of claim 1 , wherein the lateral extent of the light emitting diodes discontinuously decreases between the n-doped compound semiconductor substrate layer and the p-doped semiconductor region with increasing vertical distance from the top surface of the light emitting diodes towards the frontside of the backplane.

14. The light emitting device of claim 1 further comprising optical lenses on the at least one common conductive layer.

15. A method of forming a light emitting device, comprising:

attaching an array of light emitting diodes to a frontside of a backplane;

applying a positive tone, imageable dielectric material layer to the frontside of the backplane;

vertically recessing the positive tone, imageable dielectric material layer such that a top surface of the positive tone, imageable dielectric material layer is formed below a horizontal plane including top surfaces of the light emitting diodes, wherein sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile such that a lateral extent of the light emitting diodes decreases with increasing vertical distance from a top surface of the light emitting diodes towards the frontside of the backplane;

forming a conductive adhesion layer at least on upper portions of the sidewalls of the light emitting diodes and the top surface of the positive tone, imageable dielectric material layer; and

forming a transparent conductive layer on a frontside surface of the conductive adhesion layer,

wherein each light emitting diode of the array of light emitting diodes comprises an n-doped compound semiconductor substrate layer, an n-doped compound semiconductor region, an active region, a p-doped semiconductor region, and an anode contact that are sequentially stacked.

16. The method of claim 15 , wherein each light emitting diode of the array of light emitting diodes further comprises a reflective metal layer formed on a top surface of the anode contact.

17. The method of claim 16 , wherein each light emitting diode of the array of light emitting diodes further comprises a dielectric material layer between the reflective metal layer and the anode contact.

18. The method of claim 17 , wherein the reflective metal layer extends downward such that laterally surrounding the n-doped compound semiconductor region, and the n-doped compound semiconductor substrate layer.

19. The method of claim 15 , wherein the n-doped compound semiconductor region is a continuous planar semiconductor layer formed on the n-doped compound semiconductor substrate layer.

20. The method of claim 15 , wherein each light emitting diode of the array of light emitting diodes further comprises a mask layer between the n-doped compound semiconductor substrate layer and the n-doped compound semiconductor region.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2024
From: SYSONAN, INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 069486/0722 →
CHANGE OF NAME Recorded Sep 6, 2024
From: NANOSYS, INC.
To: SYSONAN, INC.
Reel/Frame 068834/0255 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2023
From: VAN DEN HOEK, WILLIBRORDUS GERARDUS MARIA; LAU, TSUN YIN; DANESH, CAMERON; DANESH, FARIBA
To: NANOSYS, INC.
Reel/Frame 065943/0680 →
Continuity (5)
Continuation 17818822 · Aug 10, 2022
Division 16884523 · May 27, 2020
Provisional Application 62865622 · Jun 24, 2019
Provisional Application 62854428 · May 30, 2019
Related Publication 20240113092A1 · Apr 4, 2024
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