IP Library › Granted Patent US 12,724,714
Granted Patent B2
US 12,724,714 · App. 18/494,339 · Granted Sep 1, 2026

Identification of available memory of a data storage device attachable as a memory device

Inventor: Luca Bert (San Jose, CA)
Assignee: Micron Technology, Inc.
G06F12/0871G06F12/0815
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Quick Facts
Patent No.
US 12,724,714
App. No.
18/494,339
Granted
Sep 1, 2026
Kind
B2
Abstract

A host system connected to a memory sub-system via a connection to query memory attachment capabilities of the memory sub-system in providing memory services over the connection. The memory sub-system can allocate a portion of its memory resources to provide storage services to the host system, and allocate another portion of its memory resources to provide memory services to the host system. In response to the query, the memory sub-system can provide a response containing data indicative of memory attachment capabilities of the memory sub-system. The host system can configure the memory services of the memory sub-system, such as a solid-state drive, based on the data received as a response to the query. The query and response can be implemented in the protocol over the connection for storage access, or in the protocol over the connection for memory access.

Claims (60)

1 . A method, comprising:

communicating, by a memory sub-system, with a host system over a connection between the memory sub-system and the host system;

allocating, by the memory sub-system, a first portion of memory resources of the memory sub-system to provide storage services to the host system over the connection according to a first protocol;

receiving, in the memory sub-system, a query about memory attachment capabilities of the memory sub-system;

identifying, by the memory sub-system, data representative of memory attachment capabilities of the memory sub-system in providing memory services to the host system according to a second protocol different from the first protocol, wherein communications using the first protocol and the second protocol occur over separate physical connections of the connection between the memory sub-system and the host system;

configuring, by the memory sub-system, a response to include the data representative of memory attachment capabilities of the memory sub-system; and

providing, by the memory sub-system in response to the query, the response.

2 . The method of claim 1 , wherein the data is representative of memory attachment capabilities of the memory sub-system in providing, over the connection, memory services to the host system according to the second protocol.

3 . The method of claim 2 , wherein the connection is in accordance with computer express link (CXL).

4 . The method of claim 3 , wherein the second protocol is configured for cache coherent memory access to the memory services.

5 . The method of claim 4 , wherein the data is indicative of an amount of memory available in the memory sub-system for allocation to the memory services.

6 . The method of claim 5 , wherein the data is further indicative of a ratio between a volatile portion and a non-volatile portion of the amount of memory available in the memory sub-system for allocation to the memory services.

7 . The method of claim 5 , wherein the data is further indicative of an access time of the amount of memory available in the memory sub-system for allocation to the memory services.

8 . The method of claim 5 , further comprising:

storing, by the memory sub-system, the data at a predetermined logical block address;

wherein the query includes a read command containing the predetermined logical block address.

9 . The method of claim 8 , wherein the storing is in response to installation of firmware of the memory sub-system; and the data is stored as part of the firmware of the memory sub-system.

10 . The method of claim 5 , further comprising:

allocating, by the memory sub-system, a second portion of the memory resources to provide the memory services to the host system over the connection according to the second protocol;

storing, by the memory sub-system, the data at predetermined memory addresses;

wherein the query is responsive to load instructions executed in the host system and identifying the predetermined memory addresses.

11 . The method of claim 10 , wherein the storing is in response to a power-up operation of firmware executed in the memory sub-system.

12 . A memory sub-system, comprising:

a host interface operable on a connection to a host system, wherein the connection comprises at least two different physical connections between the host system and the memory sub-system, wherein a first connection of the at least two different physical connections is configured for use with communications according to a first protocol and a second connection of the at least two different physical connections is configured for use with communications according to a second protocol;

volatile memory, wherein the memory sub-system is operable to allocate a portion of the volatile memory to provide memory services to the host system over the connection;

non-volatile memory operable to provide storage services to the host system over the connection;

a backup power source; and

a controller configured to:

receive, via the host interface, a query about capabilities of the memory sub-system in the memory services to the host system over the connection; and

provide, via the host interface, a response to the query, the response including data indicative of the capabilities of the memory sub-system in the memory services to the host system over the connection, wherein the data is indicative of at least one of (a) a ratio between a volatile portion and a non-volatile portion of the amount of memory available or (b) an access time of the amount of memory available.

13 . The memory sub-system of claim 12 , wherein the connection is in accordance with computer express link (CXL).

14 . The memory sub-system of claim 13 , wherein the data is indicative of:

an amount of memory available in the memory sub-system for allocation to the memory services;

a ratio between a volatile portion and a non-volatile portion of the amount of memory available in the memory sub-system for allocation to the memory services; and

an access time of the amount of memory available in the memory sub-system for allocation to the memory services.

15 . The memory sub-system of claim 14 , wherein the memory sub-system is configured to store the data, as part of firmware of the memory sub-system, at a predetermined logical block address during installation of the firmware of the memory sub-system; and

wherein the memory sub-system is configured to provide the response in response to a read command containing the predetermined logical block address.

16 . The memory sub-system of claim 14 , wherein the memory sub-system is configured to store the data at predetermined memory addresses during a power-up operation of firmware executed in the memory sub-system; and

wherein the memory sub-system is configured to provide the response in response to load instructions executed in the host system to identify the predetermined memory addresses.

17 . A non-transitory computer storage medium storing instructions which, when executed in a computing system, cause the computing system to perform a method, comprising:

operating a cache in a host system of the computing system to access memory services provided in the computing system;

configuring a plurality of queues in a memory of the host system to access storage services provided by a solid-state drive connected to the host system over a computer express link connection;

allocating, by the solid-state drive, a first portion of memory resources of the memory sub-system to provide the storage services to the host system over the computer express link connection according to a first protocol of storage access through the queues;

allocating, by the solid-state drive, a first portion of the memory resources to provide the memory services over the computer express link connection according to a second protocol of cache coherent memory access;

transmitting, over the computer express link connection from the host system to the solid-state drive, a query;

transmitting, over the computer express link connection from the solid-state drive to the host system, a response to the query, the response including data identifying memory attachment capabilities of the solid-state drive in providing the memory services according to a second protocol different from the first protocol, wherein communications using the first protocol and the second protocol occur over separate physical connections of the connection between the memory sub-system and the host system; and

configuring, based on the data, the memory services provided by the solid-state drive to the host system over the computer express link connection.

18 . The non-transitory computer storage medium of claim 17 , wherein the data is indicative of:

an amount of memory available in the solid-state drive for allocation to the memory services;

a ratio between a volatile portion and a non-volatile portion of the amount of memory available in the solid-state drive for allocation to the memory services; and

an access time of the amount of memory available in the solid-state drive for allocation to the memory services.

19 . The non-transitory computer storage medium of claim 18 , wherein the method further comprises:

storing, by the solid-state drive, the data at a predetermined logical block address, as part of firmware of the solid-state drive during installation of the firmware of the solid-state drive;

wherein the response is transmitted in response to a read command containing the predetermined logical block address.

20 . The non-transitory computer storage medium of claim 18 , wherein the method further comprises:

storing, by the solid-state drive, the data at predetermined memory addresses during a power-up operation of firmware executed in the solid-state drive; and

wherein the solid-state drive is configured to provide the response in response to load instructions executed in the host system to identify the predetermined memory addresses.

21 . The method of claim 1 , wherein the query about the memory attachment capabilities of the memory sub-system is formatted according to the first protocol.

22 . The method of claim 21 , wherein the query is sent over one of the separate physical connections associated with the first protocol.

23 . The method of claim 1 , wherein the query about the memory attachment capabilities of the memory sub-system is formatted according to the second protocol.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2023
From: BERT, LUCA
To: MICRON TECHNOLOGY, INC.
Reel/Frame 065342/0323 →
Continuity (2)
Provisional Application 63385107 · Nov 28, 2022
Related Publication 20240176745A1 · May 30, 2024
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