IP Library Granted Patent US 12,641,879
Granted Patent B2
US 12,641,879 · App. 18/505,778 · Granted May 26, 2026

Organic light emitting diode display

Inventors: Joon Woo Bae (Hwaseong-si, KR); So Young Koo (Yongin-si, KR); Han Bit Kim (Seoul, KR); Thanh Tien Nguyen (Seoul, KR); Kyoung Won Lee (Seoul, KR); Yong Su Lee (Seoul, KR); Jae Seob Lee (Seoul, KR); Gyoo Chul Jo (Suwon-si, KR)
Assignee: Samsung Display Co., Ltd.
H10D86/423H10K59/1213H10K59/1216H10K59/126H10K59/131H10K59/873H10D30/6723H10D30/6731H10D30/6745H10D30/6755H10D86/441H10D86/481H10D86/60
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Quick Facts
Patent No.
US 12,641,879
App. No.
18/505,778
Granted
May 26, 2026
Kind
B2
Abstract

An organic light emitting diode display according to an exemplary embodiment includes: a substrate; a first buffer layer on the substrate; a first semiconductor layer on the first buffer layer; a first gate insulating layer on the first semiconductor layer; a first gate electrode and a blocking layer on the first gate insulating layer; a second buffer layer on the first gate electrode; a second semiconductor layer on the second buffer layer; a second gate insulating layer on the second semiconductor layer; and a second gate electrode on the second gate insulating layer.

Claims (56)

1 . An organic light emitting diode display, comprising:

a substrate;

a first buffer layer on the substrate;

a first semiconductor layer on the first buffer layer;

a first gate insulating layer on the first semiconductor layer;

a first gate electrode on the first gate insulating layer;

a second gate insulating layer on the first gate electrode;

an upper electrode and a blocking layer on the second gate insulating layer, the upper electrode being spaced apart from the blocking layer along a direction parallel to a surface of the substrate, and the upper electrode and the blocking layer including a same material as each other;

a second buffer layer on and over a topmost surface of both the upper electrode and the blocking layer, the second buffer layer contacting the topmost surface of the upper electrode and the blocking layer;

a second semiconductor layer on the second buffer layer, the second semiconductor layer including a channel region;

a third gate insulating layer on the second semiconductor layer;

a second gate electrode on the third gate insulating layer;

a passivation layer on the second gate electrode;

a pixel electrode on the passivation layer;

an organic emission layer on the pixel electrode; and

a common electrode on the organic emission layer, wherein

the blocking layer is disposed in a same layer as the upper electrode, the blocking layer overlapping the channel region of the second semiconductor layer in a direction perpendicular to the surface of the substrate,

the first semiconductor layer comprises polysilicon, and the second semiconductor layer comprises an oxide semiconductor, and

the upper electrode overlaps a center of the first gate electrode along the direction perpendicular to the surface of the substrate.

2 . The organic light emitting diode display as claimed in claim 1 , further comprising:

an interlayer insulating layer on the second gate electrode and below the passivation layer; and

a first electrode and a second electrode on the interlayer insulating layer, wherein

the first electrode is in contact with the first semiconductor layer, and

the second electrode is in contact with the second semiconductor layer.

3 . The organic light emitting diode display as claimed in claim 2 , wherein the first electrode and the second electrode are in contact with a top surface of the interlayer insulating layer.

4 . The organic light emitting diode display as claimed in claim 3 , further comprising:

a driving voltage line transmitting a driving voltage,

wherein the blocking layer is electrically connected to the driving voltage line.

5 . The organic light emitting diode display as claimed in claim 2 , wherein the upper electrode overlaps the first gate electrode in a direction perpendicular to the surface of the substrate.

6 . The organic light emitting diode display as claimed in claim 2 , wherein

the passivation layer is on the first electrode and the second electrode.

7 . The organic light emitting diode display as claimed in claim 6 , wherein the pixel electrode is electrically connected to the second electrode.

8 . The organic light emitting diode display as claimed in claim 7 , further comprising:

an encapsulation layer on the common electrode.

9 . The organic light emitting diode display as claimed in claim 1 , wherein the blocking layer comprises a same material as the upper electrode.

10 . The organic light emitting diode display as claimed in claim 1 , wherein the blocking layer is electrically conductive.

11 . The organic light emitting diode display as claimed in claim 1 , wherein the blocking layer does not overlap the upper electrode in a direction perpendicular to the surface of the substrate.

12 . The organic light emitting diode display as claimed in claim 1 , further comprising a driving voltage line transmitting a driving voltage,

wherein the blocking layer is electrically connected to the driving voltage line.

13 . The organic light emitting diode display as claimed in claim 12 , further comprising an interlayer insulating layer disposed on the second gate electrode,

wherein the driving voltage line is disposed on the interlayer insulating layer.

14 . The organic light emitting diode display as claimed in claim 1 , wherein the blocking layer is comprised of a metal having a conductive characteristic.

15 . The organic light emitting diode display as claimed in claim 1 , wherein the blocking layer reduces a kickback voltage due to parasitic capacitance of a first transistor and a second transistor, and

the first transistor comprises the first semiconductor layer and the first gate electrode and the second transistor comprises the second semiconductor layer and the second gate electrode.

16 . The organic light emitting diode display as claimed in claim 1 , wherein the blocking layer is connected to a driving voltage line to receive a driving voltage.

17 . The organic light emitting diode display as claimed in claim 1 , wherein

the first gate insulating layer is disposed directly on the first semiconductor layer,

the first gate electrode is disposed directly on the first gate insulating layer,

the second gate insulating layer is disposed directly on the first gate electrode, and

the upper electrode and the blocking layer are both disposed directly on a top surface of the second gate insulating layer, the top surface of the second gate insulating layer facing away from the substrate,

the second semiconductor layer is disposed directly on the second buffer layer,

the third gate insulating layer is disposed directly on the second semiconductor layer, and

the second gate electrode is disposed directly on the third gate insulating layer.

18 . The organic light emitting diode display as claimed in claim 1 , further comprising

pixels disposed on the substrate, wherein

the first semiconductor layer and the second semiconductor layer are both disposed directly between the pixels as seen from a plan view.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2023
From: BAE, JOON WOO; KOO, SO YOUNG; KIM, HAN BIT; NGUYEN, THANH TIEN; LEE, KYOUNG WON; LEE, YONG SU; LEE, JAE SEOB
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 065513/0923 →
Priority Claims (1)
KR 10-2018-0118769 · Oct 5, 2018 · national
Continuity (3)
Continuation 17572913 · Jan 11, 2022
Continuation 16591966 · Oct 3, 2019
Related Publication 20240081099A1 · Mar 7, 2024
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