IP Library › Granted Patent US 12,412,827
Granted Patent B2
US 12,412,827 · App. 18/513,866 · Granted Sep 9, 2025

Semiconductor die package with conductive line crack prevention design

Inventors: Ya-Huei Lee (Zhunan Township, Miaoli County, TW); Shu-Shen Yeh (Taoyuan, TW); Kuo-Ching Hsu (Taipei, TW); Shyue-Ter Leu (Hsinchu, TW); Po-Yao Lin (Zhudong Township, Hsinchu County, TW); Shin-Puu Jeng (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L23/49838H01L23/49822H01L24/16H01L2224/16227H01L2924/1016H01L2924/20645
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Quick Facts
Patent No.
US 12,412,827
App. No.
18/513,866
Granted
Sep 9, 2025
Kind
B2
Abstract

A semiconductor die package is provided. The semiconductor die package includes a semiconductor die and a package substrate supporting and electrically connected to the semiconductor die. The semiconductor die has a corner. The package substrate includes several conductive lines, and one of the conductive lines under the corner of the semiconductor die includes a first line segment and a second line segment connected to the first line segment. The first line segment is linear and extends in a first direction. The second line segment is non-linear and has a varying extension direction.

Claims (33)

1. A semiconductor die package, comprising:

a semiconductor die having a corner; and

a package substrate supporting and electrically connected to the semiconductor die, wherein the package substrate comprises a plurality of conductive lines, and one of the conductive lines under the corner comprises:

a first line segment; and

a second line segment connected to the first line segment, wherein the first line segment is linear and extends in a first direction, and the second line segment is non-linear and has a varying extension direction.

2. The semiconductor die package as claimed in claim 1 , wherein the second line segment is located in a die corner area which is within a projection area of the semiconductor die and close to the corner.

3. The semiconductor die package as claimed in claim 1 , wherein a line width of the second line segment is smaller than a line width of the first line segment.

4. The semiconductor die package as claimed in claim 1 , wherein an angle formed between a tangent direction of a part of the second line segment that intersects the first line segment and a second direction perpendicular to the first direction is greater than 0 degrees and equal to or less than 60 degrees.

5. The semiconductor die package as claimed in claim 1 , wherein a distance between a leftmost end of the second line segment and a rightmost end of the second line segment in a second direction is greater than a line width of the first segment in the second direction, the second direction being perpendicular to the first direction.

6. The semiconductor die package as claimed in claim 1 , wherein the second line segment has a parabolic pattern.

7. The semiconductor die package as claimed in claim 1 , wherein the second line segment has a zig-zag pattern.

8. The semiconductor die package as claimed in claim 1 , wherein the second line segment has a first end connected to the first line segment and a second end away from the first line segment, and the first end and the second end are located on a virtual straight line aligned with the first line segment in the first direction.

9. Semiconductor die package as claimed in claim 1 , wherein the package substrate further comprises a plurality of conductive pads through which the semiconductor die is bonded to the package substrate, wherein the first line segment has a first end connected to one of the conductive pads and a second end connected to the second line segment.

10. The semiconductor die package as claimed in claim 1 , wherein the package substrate further includes a plurality of conductive vias electrically connected to some of the conductive lines stacked in a vertical direction perpendicular to the first direction, wherein the first line segment has a first end connected to one of the conductive vias and a second end connected to the second line segment.

11. A semiconductor die package, comprising:

a semiconductor die having a corner; and

a package substrate supporting and electrically connected to the semiconductor die, wherein the package substrate comprises a plurality of conductive lines, and one of the conductive lines under the corner comprises:

a first line segment; and

a second line segment connected to the first line segment, wherein the first line segment is linear, and the second line segment is non-linear and has at least one bending part.

12. The semiconductor die package as claimed in claim 11 , wherein the second line segment is located in a die corner area which is within a projection area of the semiconductor die and close to the corner.

13. The semiconductor die package as claimed in claim 11 , wherein the second line segment has a first end connected to the first line segment and a second end away from the first line segment, and the first end and the second end are located on a virtual straight line, wherein the at least one bending part of the second line segment is located on at least one side of the virtual straight line.

14. The semiconductor die package as claimed in claim 13 , wherein the second line segment has a parabolic pattern and has one bending part on one side of the virtual straight line.

15. The semiconductor die package as claimed in claim 13 , wherein the second line segment has a zig-zag pattern and has bending parts on both sides of the virtual straight line.

16. A semiconductor die package, comprising:

a semiconductor die having a corner; and

a package substrate below the semiconductor die and comprising a plurality of conductive lines, wherein one of the conductive lines under the corner comprises:

a first line segment;

a second line segment; and

a third line segment, wherein the second line segment is interposed between the first line segment and the third line segment, and is located in a die corner area which is within a projection area of the semiconductor die and close to the corner, and wherein the first line segment is linear, and the second line segment is non-linear and has at least one bending part, wherein the first line segment extends in a first direction, and wherein an angle formed between a tangent direction of a part of the second line segment that intersects the first line segment and a second direction perpendicular to the first direction is greater than 0 degrees and equal to or less than 60 degrees.

17. The semiconductor die package as claimed in claim 16 , wherein the third line segment is linear and extends in the first direction.

18. Semiconductor die package as claimed in claim 16 , wherein the third line segment is non-linear and has at least one bending part.

19. The semiconductor die package as claimed in claim 16 , wherein the second line segment has a zig-zag pattern.

20. The semiconductor die package as claimed in claim 16 , wherein a line width of the second line segment is smaller than a line width of the first line segment.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2023
From: LEE, YA-HUEI; YEH, SHU-SHEN; HSU, KUO-CHING; LEU, SHYUE-TER; LIN, PO-YAO; JENG, SHIN-PUU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 065617/0180 →
Continuity (2)
Continuation 17377620 · Jul 16, 2021
Related Publication 20240096778A1 · Mar 21, 2024
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