IP Library › Granted Patent US 12,340,260
Granted Patent B2
US 12,340,260 · App. 18/515,027 · Granted Jun 24, 2025

Critical section speedup using help-enabled locks

Inventors: Yosef Lev (New York, NY); Victor M. Luchangco (Cambridge, MA); David Dice (Foxboro, MA); Alex Kogan (Needham, MA); Timothy L. Harris (Cambridge, GB); Pantea Zardoshti (Bethlehem, PA)
Assignee: Oracle International Corporation
G06F9/526G06F9/524G06F9/542
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Quick Facts
Patent No.
US 12,340,260
App. No.
18/515,027
Granted
Jun 24, 2025
Kind
B2
Abstract

A first data accessor acquires a lock associated with a critical section. The first data accessor initiates a help session associated with a first operation of the critical section. In the help session, a second data accessor (which has not acquired the first lock) performs one or more sub-operations of the first operation. The first data accessor releases the lock after at least the first operation has been completed.

Claims (51)

1. A computer-implemented method, comprising:

determining, based on one or more criteria, that (a) a first operation of a plurality of operations of a critical section is to be performed exclusively by a first data accessor which holds a first lock associated with the critical section and (b) a second operation of the plurality of operations of the critical section is to be performed in a first help session while the first data accessor holds the first lock, wherein during the first help session, one or more other data accessors are permitted to perform individual ones of a plurality of sub-operations of the second operation;

performing, by the first data accessor, the first operation; and

performing, during the first help session while the first data accessor holds the first lock, by a second data accessor which has requested the first lock and has not been granted the first lock, a particular sub-operation of the second operation.

2. The computer-implemented method as recited in claim 1 , further comprising:

performing, exclusively by the first data accessor, after the first help session is completed, a third operation of the critical section; and

performing, during a second help session, by a third data accessor which has requested the first lock and has not been granted the first lock, a particular sub-operation of a fourth operation of the critical section, wherein the second help session is started after the third operation is performed by the first data accessor.

3. The computer-implemented method as recited in claim 1 , further comprising:

performing, during the first help session, another sub-operation of the second operation by a third data accessor which has (a) requested the first lock and has not been granted the first lock and (b) determined that a limit on the number of data accessors participating in the first help session has not been exceeded.

4. The computer-implemented method as recited in claim 1 , further comprising:

performing, during the first help session, by the first data accessor, another sub-operation of the second operation.

5. The computer-implemented method as recited in claim 1 , further comprising:

determining, based at least in part on identifying (a) the first operation as a single-threaded operation and (b) the second operation as a parallelizable operation, that a criterion of the one or more criteria has been satisfied.

6. The computer-implemented method as recited in claim 1 , further comprising:

determining, based at least in part on an overhead associated with dividing the first operation into sub-operations which can be performed by other data accessors, that a criterion of the one or more criteria has been satisfied.

7. The computer-implemented method as recited in claim 1 , further comprising:

obtaining, from the first lock by the second data accessor, an indication of the particular sub-operation.

8. A system, comprising:

one or more computing devices;

wherein the one or more computing devices include instructions that upon execution on or across the one or more computing devices cause the one or more computing devices to:

determine, based on one or more criteria, that (a) a first operation of a plurality of operations of a critical section is to be performed exclusively by a first data accessor which holds a first lock associated with the critical section and (b) a second operation of the plurality of operations of the critical section is to be performed in a first help session while the first data accessor holds the first lock, wherein during the first help session, one or more other data accessors are permitted to perform individual ones of a plurality of sub-operations of the second operation;

perform, by the first data accessor, the first operation; and

perform, during the first help session while the first data accessor holds the first lock, by a second data accessor which has requested the first lock and has not been granted the first lock, a particular sub-operation of the second operation.

9. The system as recited in claim 8 , wherein the one or more computing devices include further instructions that upon execution on or across the one or more computing devices further cause the one or more computing devices to:

perform, exclusively by the first data accessor, after the first help session is completed, a third operation of the critical section; and

perform, during a second help session, by a third data accessor which has requested the first lock and has not been granted the first lock, a particular sub-operation of a fourth operation of the critical section, wherein the second help session is started after the third operation is performed by the first data accessor.

10. The system as recited in claim 8 , wherein the one or more computing devices include further instructions that upon execution on or across the one or more computing devices further cause the one or more computing devices to:

perform, during the first help session, another sub-operation of the second operation by a third data accessor which has (a) requested the first lock and has not been granted the first lock and (b) determined that a limit on the number of data accessors participating in the first help session has not been exceeded.

11. The system as recited in claim 8 , wherein the one or more computing devices include further instructions that upon execution on or across the one or more computing devices further cause the one or more computing devices to:

perform, during the first help session, by the first data accessor, another sub-operation of the second operation.

12. The system as recited in claim 8 , wherein the one or more computing devices include further instructions that upon execution on or across the one or more computing devices further cause the one or more computing devices to:

determine, based at least in part on identifying (a) the first operation as a single-threaded operation and (b) the second operation as a parallelizable operation, that a criterion of the one or more criteria has been satisfied.

13. The system as recited in claim 8 , wherein the one or more computing devices include further instructions that upon execution on or across the one or more computing devices further cause the one or more computing devices to:

determine, based at least in part on an overhead associated with dividing the first operation into sub-operations which can be performed by other data accessors, that a criterion of the one or more criteria has been satisfied.

14. The system as recited in claim 8 , wherein the one or more computing devices include further instructions that upon execution on or across the one or more computing devices further cause the one or more computing devices to:

obtain, from the first lock by the second data accessor, an indication of the particular sub-operation.

15. One or more non-transitory computer-accessible storage media storing program instructions that when executed on or across one or more processors cause the one or more processors to:

determine, based on one or more criteria, that (a) a first operation of a plurality of operations of a critical section is to be performed exclusively by a first data accessor which holds a first lock associated with the critical section and (b) a second operation of the plurality of operations of the critical section is to be performed in a first help session while the first data accessor holds the first lock, wherein during the first help session, one or more other data accessors are permitted to perform individual ones of a plurality of sub-operations of the second operation;

perform, by the first data accessor, the first operation; and

perform, during the first help session while the first data accessor holds the first lock, by a second data accessor which has requested the first lock and has not been granted the first lock, a particular sub-operation of the second operation.

16. The one or more non-transitory computer-accessible storage media as recited in claim 15 , storing further program instructions that when executed on or across the one or more processors further cause the one or more processors to:

perform, exclusively by the first data accessor, after the first help session is completed, a third operation of the critical section; and

perform, during a second help session, by a third data accessor which has requested the first lock and has not been granted the first lock, a particular sub-operation of a fourth operation of the critical section, wherein the second help session is started after the third operation is performed by the first data accessor.

17. The one or more non-transitory computer-accessible storage media as recited in claim 15 , storing further program instructions that when executed on or across the one or more processors further cause the one or more processors to:

perform, during the first help session, another sub-operation of the second operation by a third data accessor which has (a) requested the first lock and has not been granted the first lock and (b) determined that a limit on the number of data accessors participating in the first help session has not been exceeded.

18. The one or more non-transitory computer-accessible storage media as recited in claim 15 , storing further program instructions that when executed on or across the one or more processors further cause the one or more processors to:

perform, during the first help session, by the first data accessor, another sub-operation of the second operation.

19. The one or more non-transitory computer-accessible storage media as recited in claim 15 , storing further program instructions that when executed on or across the one or more processors further cause the one or more processors to:

determine, based at least in part on identifying (a) the first operation as a single-threaded operation and (b) the second operation as a parallelizable operation, that a criterion of the one or more criteria has been satisfied.

20. The one or more non-transitory computer-accessible storage media as recited in claim 15 , storing further program instructions that when executed on or across the one or more processors further cause the one or more processors to:

determine, based at least in part on an overhead associated with dividing the first operation into sub-operations which can be performed by other data accessors, that a criterion of the one or more criteria has been satisfied.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2023
From: LEV, YOSEF; LUCHANGCO, VICTOR M.; DICE, DAVID; KOGAN, ALEX; HARRIS, TIMOTHY L.; ZARDOSHTI, PANTEA
To: ORACLE INTERNATIONAL CORPORATION
Reel/Frame 065631/0743 →
Continuity (3)
Continuation 17378488 · Jul 16, 2021
Continuation 16164678 · Oct 18, 2018
Related Publication 20240086261A1 · Mar 14, 2024
References Cited (28)
US 6836887B1 · Such · 2004 [cited by applicant]
US 7093230B2 · E et al. · 2006 [cited by applicant]
US 7617180B1 · Sehgal · 2009 [cited by examiner]
US 8037476B1 · Shavit et al. · 2011 [cited by applicant]
US 8468526B2 · Saha et al. · 2013 [cited by applicant]
US 8516483B2 · Chinya et al. · 2013 [cited by applicant]
US 8918791B1 · Chudgar · 2014 [cited by examiner]
US 11068319B2 · Lev et al. · 2021 [cited by applicant]
US 11170816B2 · Dice et al. · 2021 [cited by applicant]
US 11561834B2 · Tringali et al. · 2023 [cited by applicant]
US 20020083063A1 · Egolf · 2002 [cited by examiner]
US 20020120428A1 · Christiaens · 2002 [cited by applicant]
US 20090133023A1 · Li et al. · 2009 [cited by applicant]
US 20100275209A1 · Detlefs · 2010 [cited by applicant]
US 20110173356A1 · Prabhu · 2011 [cited by examiner]
US 20120331238A1 · McKenney · 2012 [cited by applicant]
US 20130047163A1 · Marathe · 2013 [cited by examiner]
US 20150205733A1 · Steinmacher-Burow · 2015 [cited by applicant]
US 20150286586A1 · Yadav · 2015 [cited by applicant]
US 20160062796A1 · Dice · 2016 [cited by examiner]
US 20160246641A1 · Kogan · 2016 [cited by examiner]
US 20190303468A1 · Park · 2019 [cited by applicant]
US 20190317831A1 · Farmahini-Farahani et al. · 2019 [cited by applicant]
US 20210342202A1 · Lev et al. · 2021 [cited by applicant]
US 20230004367A1 · Liu · 2023 [cited by examiner]
Tutorialspoint Simply Easy Learning, “C++ Templates”, Retrieved from URL https://www.tutorialspoint.com/cplusplus/cpp_templates.htm on Sep. 10, 2018, pp. 1-5. [cited by applicant]
John M. Mellor-Crummey, et al., Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors, ACM Transactions on Computer Systems, vol. 9, No. 1, Feb. 1991, pp. 21-65. [cited by applicant]
The Open Group, “The Single UNIX Specification, Version 2: pthread_cond_wait”, Retrieved from URL http://pubs.opengroup.org/onlinepubs/7908799/xsh/pthread_cond_wait.html on Sep. 17, 2018, pp. 1-3. [cited by applicant]