SiC epitaxial wafer
A SiC epitaxial wafer including: a SiC substrate; and a SiC epitaxial layer stacked on one surface of the SiC substrate, wherein a diameter of the SiC substrate is 195 mm or more, and a warp is 50 μm or less.
1. A SiC epitaxial wafer comprising:
a SiC substrate; and
a SiC epitaxial layer stacked on one surface of the SiC substrate, wherein,
a diameter of the SiC substrate is 195 mm or more, and
a warp is 50 μm or less.
2. The SiC epitaxial wafer according to claim 1 ,
wherein, in a surface of the SiC epitaxial layer, in a case where supports are positioned to overlap with a circumference on 7.5 mm inside from an outermost periphery and a plane passing through parts overlapping with the supports when seen in a thickness direction is defined as a reference plane, a bow is 30 μm or less.
3. The SiC epitaxial wafer according to claim 1 ,
wherein, the warp is 30 μm or less.
4. The SiC epitaxial wafer according to claim 2 ,
wherein, the bow is 10 μm or less.
5. The SiC epitaxial wafer according to claim 2 ,
wherein, the bow is-30 μm or more.