IP Library › Granted Patent US 12,633,332
Granted Patent B1
US 12,633,332 · App. 18/540,411 · Granted May 19, 2026

Reconfigurable bitcell for PUF key generation

Inventors: Eric Hunt-Schroeder (Essex Junction, VT); Tian Xia (Burlington, VT)
Assignee: Marvell Asia Pte Ltd
G11C11/4078G11C11/4091G11C11/4096
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Quick Facts
Patent No.
US 12,633,332
App. No.
18/540,411
Granted
May 19, 2026
Kind
B1
Abstract

A method of generating a physical unclonable function (PUF) key uses a value read from an array of bitcells in rows defined by pairs of true and complement wordlines and columns defined by pairs of true and complement bitlines, each bitcell having a pull-up network coupled to a complement wordline and to the true and complement bitlines, and having a pull-down network coupled to a true wordline and to the true and complement bitlines. A pull-up network of a first bitcell is activated by the complement wordline. A pull-down network of a second bitcell is activated by the true wordline. A first value based on the pull-up network of the first bitcell and the pull-down network of the second bitcell is read using a sense amplifier coupled to a true bitline and a complement bitline. A PUF key is generated using the first value.

Claims (54)

1 . A method of generating a physical unclonable function (PUF) key using a value read from an array of bitcells, the method comprising:

arranging the array of bitcells in respective rows defined by respective pairs of true and complement wordlines and in columns defined by respective pairs of true and complement bitlines, each bitcell in the array of bitcells having a pull-up network coupled to one of the complement wordlines and to the true and complement bitlines, and having a pull-down network coupled to one of the true wordlines and to the true and complement bitlines;

activating a pull-up network of a first bitcell in the array of bitcells by activating a first complement wordline corresponding to the pull-up network;

activating a pull-down network of a second bitcell in the array of bitcells by activating a first true wordline corresponding to the pull-down network, wherein the second bitcell is different from the first bitcell;

reading a first value based on the pull-up network of the first bitcell and the pull-down network of the second bitcell using a sense amplifier coupled to a first true bitline and a first complement bitline; and

generating a first PUF key using the first value;

after generating the first PUF key using the first value, activating the pull-up network of the first bitcell in the array of bitcells by activating the first complement wordline corresponding to the pull-up network;

activating a pull-down network of a third bitcell in the array of bitcells by activating a second true wordline corresponding to the pull-down network, wherein the third bitcell is different from the first and second bitcells;

reading a second value based on the pull-up network of the first bitcell and the pull-down network of the third bitcell using a sense amplifier coupled to a first true bitline and a first complement bitline; and

generating a second PUF key using the second value.

2 . The method of generating a PUF key according to claim 1 , wherein the first true bitline and the first complement bitline are members of one respective pair of true and complement bitlines.

3 . The method of generating a PUF key according to claim 1 , wherein the first true bitline is a member of a first respective pair of true and complement bitlines, and the first complement bitline is a member of a second respective pair of true and complement bitlines.

4 . The method of generating a PUF key according to claim 1 further comprising determining, by the sense amplifier, that only one of the first value and the second value is stable.

5 . The method of generating a PUF key according to claim 1 further comprising measuring the contribution of each pull-up network of each bitcell in the array and the contribution of each pull-down network of each bitcell in the array to determine which complement wordline corresponding to a pull-up network and which true wordline corresponding to a pull-down network to activate at the same time to generate a bit value.

6 . The method of generating a PUF key according to claim 5 further comprising:

determining that the pull-up network of the first bitcell and the pull-down network of the second bitcell have contributions within a threshold level of each other; and

selecting the pull-up network of the first bitcell and the pull-down network of the second bitcell.

7 . The method of generating a PUF key according to claim 5 wherein measuring the contribution of each pull-up network of each bitcell in the array and the contribution of each pull-down network of each bitcell in the array comprises measuring the voltage of each pull-up network of each bitcell in the array and the voltage of each pull-down network of each bitcell in the array.

8 . A method of generating a physical unclonable function (PUF) using a value read from an array of bitcells, the method comprising:

arranging the array of bitcells in respective rows defined by respective pairs of true and complement wordlines and in columns defined by respective pairs of true and complement bitlines, each bitcell in the array of bitcells having a pull-up network coupled to one of the complement wordlines and to the true and complement bitlines, and having a pull-down network coupled to one of the true wordlines and to the true and complement bitlines;

activating a pull-up network of a first bitcell in the array of bitcells by activating a first complement wordline corresponding to the pull-up network;

activating a pull-down network of a second bitcell in the array of bitcells by activating a first true wordline corresponding to the pull-down network, wherein the second bitcell is different from the first bitcell;

reading a first value based on the pull-up network of the first bitcell and the pull-down network of the second bitcell using a sense amplifier coupled to a first true bitline and a first complement bitline;

activating a pull-up network of a third bitcell in the array of bitcells by activating a second complement wordline corresponding to a pull-up network, wherein the third bitcell is different from the first and second bitcells;

activating a pull-down network of a fourth bitcell in the array of bitcells by activating a second true wordline corresponding to the pull-down network, wherein the fourth bitcell is different from the first, second, and third bitcells;

reading a second value based on the pull-up network of the third bitcell and the pull-down network of the fourth bitcell using a sense amplifier coupled to the first true bitline and the first complement bitline; and

generating a first physical unclonable function (PUF) key using the first value and the second value.

9 . An entropy source for generating a PUF key comprising:

an array of bitcells arranged in respective rows defined by respective pairs of true and complement wordlines and in columns defined by respective pairs of true and complement bitlines, wherein each bitcell in the array of bitcells comprises:

a pull-up network coupled to one of the complement wordlines and to the true and complement bitlines; and

a pull-down network coupled to one of the true wordlines and to the true and complement bitlines;

control circuitry configured to:

activate a pull-up network of a first bitcell in the array of bitcells by activating a first complement wordline corresponding to the pull-up network; and

activate a pull-down network of a second bitcell in the array of bitcells by activating a first true wordline corresponding to the pull-down network, wherein the second bitcell is different from the first bitcell;

a sense amplifier coupled to a first true bitline and a first complement bitline configured to read a first value based on the pull-up network of the first bitcell and the pull-down network of the second bitcell; and

key generation circuitry configured to generate a first physical unclonable function (PUF) key using the first value, wherein,

after generating the first PUF key using the first value, the control circuitry is configured to activate the pull-up network of the first bitcell in the array of bitcells by activating the first complement wordline corresponding to the pull-up network, and activate a pull-down network of a third bitcell in the array of bitcells by activating a first true wordline corresponding to the pull-down network,

the third bitcell is different from the first and second bitcells,

the sense amplifier is further configured to read a second value based on the pull-up network of the first bitcell and the pull-down network of the third bitcell; and,

the key generation circuitry further configured to generate a second PUF key using the second value.

10 . The entropy source for generating a PUF key of claim 9 further comprising multiplexing circuitry configured to couple the sense amplifier to the first true bitline and the first complement bitline.

11 . The entropy source for generating a PUF key of claim 10 , wherein the multiplexing circuitry is further configured to, when coupling the sense amplifier to the first true bitline and the first complement bitline, select the first true bitline and the first complement bitline such that they are members of one respective pair of true and complement bitlines.

12 . The entropy source for generating a PUF key of claim 10 , wherein the multiplexing circuitry is further configured to, when coupling the sense amplifier to the first true bitline and the first complement bitline, select the first true bitline such that it is a member of a first respective pair of true and complement bitlines, and select the first complement bitline such that it is a member of a second respective pair of true and complement bitlines.

13 . The entropy source for generating a PUF key of claim 10 wherein the sense amplifier is further configured to measure the contribution of each pull-up network of each bitcell in the array and the contribution of each pull-down network of each bitcell in the array to determine which complement wordline corresponding to a pull-up network and true wordline corresponding to a pull-down network to activate at the same time to generate a bit value.

14 . The entropy source for generating a PUF key of claim 13 wherein the multiplexing circuitry is further configured to:

determine that the pull-up network of the first bitcell and the pull-down network of the second bitcell have contributions within a threshold level of each other; and

select the pull-up network of the first bitcell and the pull-down network of the second bitcell.

15 . The entropy source for generating a PUF key of claim 13 wherein the sense amplifier is further configured to, when measuring the contribution of each pull-up network of each bitcell in the array and the contribution of each pull-down network of each bitcell in the array, measure the voltage of each pull-up network of each bitcell in the array and the voltage of each pull-down network of each bitcell in the array.

16 . The entropy source for generating a PUF key of claim 9 wherein the sense amplifier is further configured to determine that only one of the first value and the second value is stable.

17 . The entropy source for generating a PUF key of claim 9 , wherein the control circuitry is further configured to:

activate a pull-up network of the third bitcell in the array of bitcells by activating a second complement wordline corresponding to the pull-up network; and

activate a pull-down network of a fourth bitcell in the array of bitcells by activating a second true wordline corresponding to the pull-down network, wherein the fourth bitcell is different from the first, second, and third bitcells;

the sense amplifier further configured to read a third value based on the pull-up network of the third bitcell and the pull-down network of the fourth bitcell; and

the key generation circuitry is further configured to generate the first PUF key also using the third value.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2025
From: HUNT-SCHROEDER, ERIC
To: MARVELL SEMICONDUCTOR, INC.
Reel/Frame 070938/0936 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2025
From: MARVELL SEMICONDUCTOR, INC.
To: MARVELL ASIA PTE LTD
Reel/Frame 070939/0030 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2024
From: XIA, TIAN
To: UNIVERSITY OF VERMONT AND STATE AGRICULTURAL COLLEGE
Reel/Frame 068827/0939 →
Continuity (1)
Provisional Application 63432847 · Dec 15, 2022
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