IP Library Patent Application 18570706
Patent Application
App. No. 18/570,706

PLATING DEFECTS ESTIMATING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

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Patent No.
US None
App. No.
18/570,706
Abstract

A plating defects estimating method comprising a measuring step of measuring physical properties of a surface of an underlayer before a plating pre-treatment step of carrying out a plating pre-treatment on the underlayer; and an estimating step of estimating a degree of development of spikes on the underlayer, the spikes resulting from plating, based on the measured physical properties. A semiconductor device manufacturing method, comprising: an underlayer forming step of forming an underlayer on a surface of a semiconductor wafer; a plating pre-treatment step of carrying out a plating pre-treatment on the underlayer; a plating step of plating the underlayer subjected to the pre-treatment; a measuring step of measuring physical properties of a surface of the underlayer before the plating pre-treatment step; and an estimating step of estimating a degree of development of spikes on the underlayer, the spikes resulting from plating, based on the measured physical properties.

Claims (31)

1 . A plating defects estimating method comprising:

a measuring step of measuring physical properties of a surface of an underlayer before a plating pre-treatment step of carrying out a plating pre-treatment on the underlayer; and

an estimating step of estimating a degree of development of spikes on the underlayer, the spikes resulting from plating, based on the measured physical properties.

2 . The plating defects estimating method according to claim 1 , wherein

the measuring step is a step of making optical measurement on a surface of the underlayer.

3 . The plating defects estimating method according to claim 2 , wherein

when reflectance on a surface of the underlayer is equal to or larger than a threshold, the degree of development of spikes is estimated to be low.

4 . The plating defects estimating method according to claim 2 , wherein

when brightness of a surface of the underlayer is equal to or larger than a threshold, the degree of development of spikes is estimated to be low.

5 . The plating defects estimating method according to claim 1 , wherein

the measuring step is a step of making X-ray diffraction measurement on a surface of the underlayer.

6 . The plating defects estimating method according to claim 5 , wherein

when a crystallite diameter of a surface of the underlayer is equal to or larger than a threshold, the degree of development of spikes is estimated to be low.

7 . The plating defects estimating method according to claim 1 , wherein

the underlayer is made of aluminum or aluminum alloy.

8 . The plating defects estimating method according to claim 1 , wherein

the plating is nickel plating or nickel alloy plating.

9 . A semiconductor device manufacturing method, comprising:

an underlayer forming step of forming an underlayer on a surface of a semiconductor wafer;

a plating pre-treatment step of carrying out a plating pre-treatment on the underlayer;

a plating step of plating the underlayer subjected to the pre-treatment;

a measuring step of measuring physical properties of a surface of the underlayer before the plating pre-treatment step; and

an estimating step of estimating a degree of development of spikes on the underlayer, the spikes resulting from plating, based on the measured physical properties.

10 . The semiconductor device manufacturing method according to claim 9 , wherein

the measuring step is a step of measuring physical properties of a surface of the underlayer in a central part of the semiconductor wafer.

11 . The semiconductor device manufacturing method according to claim 9 , wherein

the measuring step is a step of measuring physical properties of a surface of the underlayer in a peripheral part of the semiconductor wafer.

12 . The semiconductor device manufacturing method according to claim 9 , wherein

when the degree of development of spikes, the degree of development being estimated at the estimating step, is larger than a given threshold, the plating pre-treatment step and the plating step are stopped.

13 . The semiconductor device manufacturing method according to claim 9 , wherein

details of the plating pre-treatment step are made different between a case where the degree of development of spikes, the degree of development being estimated at the estimating step, is larger than a given threshold and a case where the degree of development of spikes is smaller than the given threshold.

Assignments (2)
CHANGE OF NAME Recorded Apr 30, 2025
From: HITACHI POWER SEMICONDUCTOR DEVICE LTD.
To: MINEBEA POWER SEMICONDUCTOR DEVICE INC.
Reel/Frame 071142/0232 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2023
From: KOBAYASHI, REO; TABATA, TOSHIHITO; HAMADA, KANYA
To: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
Reel/Frame 065880/0386 →