Embedding a photonic integrated circuit in a semiconductor package for high bandwidth memory and compute
A photonic integrated circuit (PIC) disposed on a substrate and comprising a semiconductor die hosting an active portion and a passive portion mutually coupled, the active portion being configured to consume electrical power when activated, and the passive portion comprising an optical transmission medium configured to propagate an optical signal to or from the active portion of the PIC; an electronic integrated circuit (EIC) electrically coupled to the active portion of the PIC and comprising components that electrically operate on the active portion of the PIC; and a packaging compound at least partially encapsulating the PIC, the packaging compound defining a cavity on a side of the semiconductor die that is opposite from the substrate, the cavity being filled with an optically transparent medium such that the optical signal can be received from or transmitted to the passive portion of the PIC through the cavity.
1. A package comprising:
a photonic integrated circuit (PIC) disposed on a substrate and comprising a semiconductor die having an active portion and a passive portion mutually coupled, the active portion being configured to consume electrical power when activated, and the passive portion comprising an optical transmission medium configured to propagate an optical signal to or from the active portion of the PIC;
a cavity formed on a side of the semiconductor die that is opposite from the substrate, the cavity being filled with an optically transparent medium with an optical refractive index substantially matching that of the optical transmission medium such that the optical signal can be received from or transmitted to the passive portion of the PIC through the cavity;
a fiber array unit (FAU) mounted on the cavity to couple the optical signal to or from outside the package; and
an electronic integrated circuit (EIC) electrically coupled to the active portion of the PIC and comprising components that electrically operate on the active portion of the PIC,
wherein the active portion of the PIC comprises an optical modulator or a photodetector or both, and the EIC comprises a driver or a transimpedance amplifier or both,
the drive being coupled to the optical modulator on the PIC and configured to drive the optical modulator such that information contents are modulated on the optical signal, and the transimpedance amplifier being coupled to the photodetector and configured to operate on the photodetector such that modulated optical signals are converted to electrical signals.
2. The package of claim 1 , further comprising:
a high-bandwidth memory (HBM); and
a processor, wherein the EIC bridges the PIC to the HBM and the processor.
3. The package of claim 2 , further comprising:
a packaging compound at least partially encapsulating the PIC, the packaging compound defining the cavity,
wherein the cavity has a thickness of substantially equal to or less than 50 μm, and
wherein the cavity has a width substantially equal to 3 mm and a length substantially equal to 40 mm.
4. The package of claim 3 ,
wherein substrate is a printed circuit board (PCB).
5. The package of claim 1 , further comprising:
a coupler disposed between the FAU and the optical transmission medium on the PIC, wherein the coupler comprises a grating coupler, wherein the optical transmission medium comprises at least one of a waveguide or a fiber, and wherein the optically transparent medium comprises ultraviolet (UV) curable epoxy having an optical refractive index substantially matched to that of the optical transmission medium.
6. The package of claim 1 , further comprising:
an additional cavity formed atop the cavity, the additional cavity being filled with the optically transparent medium such that the optical signal can be received or transmitted through the additional cavity and the cavity.
7. A package comprising:
an electronic integrated circuit (EIC);
a photonic integrated circuit (PIC) disposed on a substrate and electrically coupled to the EIC through one or more electrical connections, the PIC comprising a semiconductor die having an active portion electrically connected to the EIC and configured to consume electrical power when activated, and a passive portion comprising an optical transmission medium configured to propagate optical signals to or from the active portion of the PIC, the passive portion comprising one or more photonic ports at a surface of the PIC;
a layer of a packaging compound at least partially encapsulating the EIC and the PIC;
an optical path through the layer of packaging compound to the one or more photonic ports at the surface of the PIC; and
a fiber array unit (FAU) attached to the package and arranged to couple optical signals to or from the PIC via the one or more photonic ports,
wherein the optical path comprises a cavity formed on a side of the semiconductor die that is opposite from the substrate, the cavity being filled with an optically transparent medium with an optical refractive index substantially matching that of the optical transmission medium such that the optical signal can be received from or transmitted to the passive portion of the PIC through the cavity,
wherein the active portion of the PIC comprises an optical modulator or a photodetector or both, and the EIC comprises a driver or a transimpedance amplifier or both, the drive being coupled to the optical modulator on the PIC and configured to drive the optical modulator such that information contents are modulated on the optical signal, and the transimpedance amplifier being coupled to the photodetector and configured to operate on the photodetector such that modulated optical signals are converted to electrical signals.
8. The package of claim 7 , wherein the driver is positioned 2 mm or less from the optical modulator, and wherein the EIC at least partially overlaps the surface of the PIC.
9. The package of claim 8 , wherein the optical path is located at a portion of the PIC non-overlapping with the EIC, and
wherein the optical path comprises a layer of an ultraviolet (UV) curable epoxy.
10. The package of claim 7 , wherein the substrate supports the PIC on an opposite side of the PIC from the EIC.
11. The package of claim 7 , further comprising:
a high-bandwidth memory (HBM), and
a processor,
wherein the EIC bridges the PIC to the HBM and the processor.