Controlling speculative actions based on a hit/miss predictor
Processing within a computing environment is facilitated by using cache hit-miss predictions. A cache hit-miss prediction is determined for a memory access instruction using a predictor. One or more speculative actions are controlled, based on determining the cache hit-miss prediction is a miss. The controlling is further based on a type of cache design.
1 . A computer-implemented method of facilitating processing within a computing environment, the computer-implemented method comprising:
determining a cache hit-miss prediction for a memory access instruction, the determining the cache hit-miss prediction for the memory access instruction using a predictor;
ascertaining a type of cache design to be accessed by the memory access instruction, the type of cache design being one cache design of a bank/directory-based cache design and a coherent-based cache design; and
controlling one or more speculative actions, based on determining the cache hit-miss prediction is a miss, wherein the controlling is further based on the type of cache design ascertained to be accessed by the memory access instruction.
2 . The computer-implemented method of claim 1 , wherein the controlling the one or more speculative actions comprises suppressing one or more speculative cache accesses.
3 . The computer-implemented method of claim 1 , wherein the type of cache design is the bank/directory-based cache design, and wherein the controlling the one or more speculative actions comprises suppressing one or more speculative cache accesses.
4 . The computer-implemented method of claim 1 , wherein the controlling the one or more speculative actions comprises performing one or more speculative off-cache requests for data.
5 . The computer-implemented method of claim 1 , wherein the type of cache design is the coherent-based cache design, and wherein the controlling the one or more speculative actions comprises performing one or more speculative off-cache requests for data.
6 . The computer-implemented method of claim 1 , further comprising:
controlling one or more other speculative actions, based on determining that the cache hit-miss prediction for another memory access instruction is a hit, wherein the controlling is further based on the type of cache design.
7 . The computer-implemented method of claim 6 , wherein the type of cache design is the bank/directory-based cache design, and wherein the controlling the one or more other speculative actions comprises performing one or more speculative cache accesses.
8 . The computer-implemented method of claim 6 , wherein the type of cache design is the coherent-based cache design, and wherein the controlling the one or more other speculative actions comprises suppressing one or more speculative off-cache requests for data.
9 . The computer-implemented method of claim 1 , wherein the predictor includes a saturating counter, and wherein the determining the cache hit-miss prediction for the memory access instruction includes checking a most significant bit of the saturating counter.
10 . The computer-implemented method of claim 9 , wherein based on the most significant bit of the saturating counter being a selected value, the cache hit-miss prediction is a miss.
11 . The computer-implemented method of claim 1 , wherein the determining the cache hit-miss prediction for the memory access instruction includes:
obtaining a value of a counter of the predictor;
comparing the value of the counter to a hit-miss threshold; and
determining the cache hit-miss prediction, based on a comparison of the value of the counter with the hit-miss threshold.
12 . The computer-implemented method of claim 11 , wherein the determining the cache hit-miss prediction for the memory access instruction further comprises:
ascertaining a prediction confidence level of the cache hit-miss prediction; and
using the prediction confidence level of the cache hit-miss prediction to determine the cache hit-miss prediction.
13 . A computer system for facilitating processing within a computing environment, the computer system comprising:
at least one computing device; and
program instructions, collectively stored in a set of one or more computer readable storage media, for causing the at least one computing device to perform the following computer operations including:
determining a cache hit-miss prediction for a memory access instruction, the determining the cache hit-miss prediction for the memory access instruction using a predictor;
ascertaining a type of cache design to be accessed by the memory access instruction, the type of cache design being one cache design of a bank/directory-based cache design and a coherent-based cache design; and
controlling one or more speculative actions, based on determining the cache hit-miss prediction is a miss, wherein the controlling is further based on the type of cache design ascertained to be accessed by the memory access instruction.
14 . The computer system of claim 13 , wherein the controlling the one or more speculative actions comprises suppressing one or more speculative cache accesses.
15 . The computer system of claim 13 , wherein the controlling the one or more speculative actions comprises performing one or more speculative off-cache requests for data.
16 . A computer program product for facilitating processing within a computing environment, the computer program product comprising:
a set of one or more computer readable storage media; and
program instructions, collectively stored in the set of one or more computer readable storage media, for causing at least one computing device to perform the following computer operations including:
determining a cache hit-miss prediction for a memory access instruction, the determining the cache hit-miss prediction for the memory access instruction using a predictor;
ascertaining a type of cache design to be accessed by the memory access instruction, the type of cache design being one cache design of a bank/directory-based cache design and a coherent-based cache design; and
controlling one or more speculative actions, based on determining the cache hit-miss prediction is a miss, wherein the controlling is further based on the type of cache design ascertained to be accessed by the memory access instruction.
17 . The computer program product of claim 16 , wherein the controlling the one or more speculative actions comprises suppressing one or more speculative cache accesses.
18 . The computer program product of claim 16 , wherein the controlling the one or more speculative actions comprises performing one or more speculative off-cache requests for data.
19 . The computer-implemented method of claim 1 , wherein the one or more speculative actions comprises one speculative action based on the type of cache design being the bank/directory-based cache design and a different speculative action than the one speculative action based on the type of cache design being the coherent-based cache design.
20 . The computer-implemented method of claim 19 , wherein the one speculative action includes suppressing one or more speculative cache accesses and the different speculative action includes performing one or more speculative off-cache requests for data.