IP Library › Granted Patent US 12,748,617
Granted Patent B2
US 12,748,617 · App. 18/558,869 · Granted Sep 29, 2026

Processing method and apparatus, processor, electronic device, and storage medium

Inventor: Ling Ma (Hangzhou, CN)
Assignee: Alipay (Hangzhou) Information Technology Co., Ltd.
G06F9/48G06F12/0875
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Quick Facts
Patent No.
US 12,748,617
App. No.
18/558,869
Granted
Sep 29, 2026
Kind
B2
Abstract

One or more embodiments of this specification provide a processing method, including: when a first coroutine is executed, determining whether a to-be-fetched object in an execution process is stored in a target cache; and if it is determined that the to-be-fetched object is not stored in the target cache, prefetching the to-be-fetched object, and switching the currently executed first coroutine to a second coroutine. According to the processing method provided in the embodiments of this specification, a throughput capability of a CPU can be improved.

Claims (38)

1 . A data processing method, comprising:

when a first coroutine is executed, while accessing a level 1 cache of a plurality of levels of cache to determine whether a to-be-fetched object required for executing the first coroutine is stored in the level 1 cache, and without accessing a target cache of the plurality of levels of cache, predicting whether the to-be-fetched object is stored in the target cache, wherein the target cache is determined by: determining, in consideration of a case where the prediction result is that the to-be-fetched object is not stored in the target cache but the to-be-fetched object is actually stored in the target cache, a processing delay caused by using each of the plurality of levels of cache other than the level 1 cache as the target cache, and selecting a cache with a smallest processing delay as the target cache; and

upon determining that the to-be-fetched object is not stored in the level 1 cache and the target cache based on the accessing the level 1 cache and the predicting, prefetching the to-be-fetched object, and switching the currently executed first coroutine to a second coroutine.

2 . The method according to claim 1 , wherein the to-be-fetched object comprises a to-be-fetched target instruction, and the predicting whether a to-be-fetched object in an execution process is stored in a target cache comprises:

predicting, based on an address of the target instruction, whether the target instruction is stored in the target cache.

3 . The method according to claim 2 , wherein the target cache is a level 2 cache, and the method further comprises:

when predicting whether the target instruction is stored in the level 2 cache, accessing a level 1 cache to obtain the target instruction.

4 . The method according to claim 1 , wherein the to-be-fetched object comprises to-be-fetched target data, the target data is data that needs to be obtained based on a currently processed instruction, and the predicting whether a to-be-fetched object in an execution process is stored in a target cache comprises:

before entering a decoding phase of the currently processed instruction, performing first prediction about whether the target data is stored in the target cache.

5 . The method according to claim 4 , wherein the performing first prediction about whether the target data is stored in the target cache comprises:

predicting, based on an address of the currently processed instruction, whether the target data is stored in the target cache.

6 . The method according to claim 4 , wherein when a result of the first prediction indicates that the target data is not stored in the target cache, the prefetching the to-be-fetched object comprises:

decoding and executing the currently processed instruction, and prefetching the target data based on an address that is of the target data and that is calculated in an execution process of the currently processed instruction.

7 . The method according to claim 1 , wherein the to-be-fetched object comprises to-be-fetched target data, the target data is data that needs to be obtained based on a currently processed instruction, and the predicting whether a to-be-fetched object in an execution process is stored in a target cache comprises:

in an execution phase of the currently processed instruction, performing second prediction about whether the target data is stored in the target cache.

8 . The method according to claim 7 , wherein the performing second prediction about whether the target data is stored in the target cache comprises:

predicting, based on an address of the target data, whether the target data is stored in the target cache, wherein the address of the target data is calculated in an execution process of the currently processed instruction.

9 . The method according to claim 7 , wherein the target cache is a level 2 cache, and the method further comprises:

when performing the second prediction on the target data, accessing a level 1 cache to obtain the target data.

10 . The method according to claim 1 , wherein the to-be-fetched object comprises to-be-fetched target data, the target data is data that needs to be obtained based on a currently processed instruction, and the predicting whether a to-be-fetched object in an execution process is stored in a target cache comprises:

determining, by accessing the target cache, whether the target data is stored in the target cache.

11 . The method according to claim 1 , wherein the second coroutine is a next coroutine of the first coroutine in a coroutine chain, the coroutine chain is a closed-loop chain comprising a plurality of coroutines, and the method further comprises:

when switching is performed for a plurality of times based on the coroutine chain and switching to the first coroutine is performed again, no longer predicting whether the to-be-fetched object prefetched last time is stored in the target cache.

12 . The method according to claim 1 wherein the second coroutine is a next coroutine of the first coroutine in a coroutine chain, the coroutine chain is a closed-loop chain comprising a plurality of coroutines, and the method further comprises:

when switching is performed for a plurality of times based on the coroutine chain and switching to the first coroutine is performed again, starting processing from an instruction, in the first coroutine, whose previous processing procedure is interrupted by coroutine switching.

13 . The method according to claim 1 , wherein the switching the currently executed first coroutine to a second coroutine comprises:

storing context information of the currently executed first coroutine, and loading context information of the second coroutine.

14 . The method according to claim 1 , wherein the predicting whether a to-be-fetched object in an execution process is stored in a target cache comprises:

predicting, by using a prediction system, whether the to-be-fetched object is stored in the target cache; and

the method further comprises:

updating the prediction system based on a real result of whether the to-be-fetched object is stored in the target cache.

15 . An electronic device, comprising:

a memory and a processor, wherein the memory stores executable instructions that, in response to execution by the processor, cause the processor to:

when a first coroutine is executed, while accessing a level 1 cache of a plurality of levels of cache to determine whether a to-be-fetched object required for executing the first coroutine is stored in the level 1 cache, and without accessing a target cache of the plurality of levels of cache, predict whether the to-be-fetched object is stored in the target cache, wherein the target cache is determined by: determining, in consideration of a case where the prediction result is that the to-be-fetched object is not stored in the target cache but the to-be-fetched object is actually stored in the target cache, a processing delay caused by using each of the plurality of levels of cache other than the level 1 cache as the target cache, and selecting a cache with a smallest processing delay as the target cache; and

upon determining that the to-be-fetched object is not stored in the level 1 cache and the target cache based on the accessing the level 1 cache and the predicting, prefetch the to-be-fetched object, and switch the currently executed first coroutine to a second coroutine.

16 . A non-transitory computer-readable storage medium, comprising instructions stored therein that, when executed by a processor of a computing device, cause the processor to:

when a first coroutine is executed, while accessing a level 1 cache of a plurality of levels of cache to determine whether a to-be-fetched object required for executing the first coroutine is stored in the level 1 cache, and without accessing a target cache of the plurality of levels of cache, predict whether the to-be-fetched object is stored in the target cache, wherein the target cache is determined by: determining, in consideration of a case where the prediction result is that the to-be-fetched object is not stored in the target cache but the to-be-fetched object is actually stored in the target cache, a processing delay caused by using each of the plurality of levels of cache other than the level 1 cache as the target cache, and selecting a cache with a smallest processing delay as the target cache; and

upon determining that the to-be-fetched object is not stored in the level 1 cache and the target cache based on the accessing the level 1 cache and the predicting, prefetch the to-be-fetched object, and switch the currently executed first coroutine to a second coroutine.

Priority Claims (1)
CN 202110497973.0 · May 8, 2021 · national
Continuity (1)
Related Publication 20240231887A1 · Jul 11, 2024
References Cited (13)
US 7447883B2 · Vasekin · 2008 [cited by examiner]
US 20050081016A1 · Sakai et al. · 2005 [cited by applicant]
US 20080147977A1 · Toussi · 2008 [cited by applicant]
US 20120102269A1 · Ono et al. · 2012 [cited by applicant]
US 20130332778A1 · Spracklen · 2013 [cited by examiner]
US 20190278608A1 · Psaropoulos et al. · 2019 [cited by applicant]
US 20190278858A1 · Psaropoulos et al. · 2019 [cited by applicant]
CN 109298922A · 2019 [cited by applicant]
CN 109983445A · 2019 [cited by applicant]
CN 112199400A · 2021 [cited by applicant]
CN 112925632A · 2021 [cited by applicant]
DE 102020131816A1 · 2021 [cited by examiner]
The International Search Report and Written Opinion of the International Searching Authority for International Application No. PCT /CN2022/090295 mailed on Jul. 6, 2022. [cited by applicant]