IP Library › Granted Patent US 12,300,442
Granted Patent B2
US 12,300,442 · App. 18/591,095 · Granted May 13, 2025

Multilayer ceramic capacitor

Inventor: Yasuyuki Shimada (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01G4/30H01G4/012H01G4/1227H01G4/224H01G4/0085
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Quick Facts
Patent No.
US 12,300,442
App. No.
18/591,095
Granted
May 13, 2025
Kind
B2
Abstract

A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes respectively on two end surfaces of the multilayer body. Each of the dielectric layers includes, at a location coincident with an end portion of a respective one of the internal electrodes, a thick-walled portion thicker in a stacking direction than a portion corresponding in position to a middle portion of a main surface of the multilayer body. When viewed in the stacking direction, positions of some of the thick-walled portions of the dielectric layers are out of alignment with positions of a remainder of the thick-walled portions of the dielectric layers.

Claims (21)

1. A multilayer ceramic capacitor comprising:

a multilayer body including a plurality of dielectric layers and a plurality of internal electrodes stacked on one another, the multilayer body including two main surfaces facing each other in a stacking direction, two end surfaces facing each other in a length direction orthogonal or substantially orthogonal to the stacking direction, and two side surfaces facing each other in a width direction orthogonal or substantially orthogonal to the stacking direction and the length direction; and

external electrodes respectively on the two end surfaces of the multilayer body;

wherein

the multilayer body includes:

an inner layer portion in which the plurality of dielectric layers and the plurality of internal electrodes are stacked in the stacking direction, the plurality of internal electrodes include two internal electrodes that are disposed adjacent to the two main surfaces, respectively, and the two internal electrodes sandwich a remainder of the plurality of internal electrodes and the plurality of dielectric layers in the stacking direction; and

outer layer portions sandwiching the inner layer portion in the stacking direction;

each of the plurality of dielectric layers includes, at a location coincident with an end portion of a respective one of the internal electrodes, a thick-walled portion thicker in the stacking direction than a portion of the dielectric layer corresponding in position to a substantially middle portion of the inner layer portion; and

a position of at least a portion of the thick-walled portions is out of alignment with a position of a remainder of the thick-walled portions in the length direction or the width direction.

2. The multilayer ceramic capacitor according to claim 1 , wherein the thick-walled portions include thick-walled portions which are adjacent to each other in the stacking direction and which are out of alignment with each other in the length direction or the width direction.

3. The multilayer ceramic capacitor according to claim 1 , wherein

the end portions of the internal electrodes are end portions in the width direction; and

the positions of the thick-walled portions are out of alignment with each other in the width direction.

4. The multilayer ceramic capacitor according to claim 1 , wherein

the end portions of the internal electrodes are end portions in the length direction; and

the positions of the thick-walled portions are out of alignment with each other in the length direction.

5. The multilayer ceramic capacitor according to claim 3 , wherein each of the thick-walled portions has a band shape having a width of about 10 μm to about 80 μm in the width direction from an end of the respective one of the internal electrodes, and extends in the length direction.

6. The multilayer ceramic capacitor according to claim 4 , wherein each of the thick-walled portions has a band shape having a width of about 10 μm to about 80 μm in the length direction from an end of the respective one of the internal electrodes, and extends in the width direction.

7. The multilayer ceramic capacitor according to claim 1 , wherein each of the thick-walled portions includes a thickest portion that is thicker than any other portion of the thick-walled portion, and a position of the thickest portion is defined as the position of the thick-walled portion.

8. The multilayer ceramic capacitor according to claim 1 , wherein the position of each of the thick-walled portions is coincident with an end of the respective one of the internal electrodes.

9. The multilayer ceramic capacitor according to claim 1 , wherein each thick-walled portion includes a thickest portion that is thicker than any other portion of the thick-walled portion, and the thickest portion is about 1.05 times to about 1.30 times as thick as a portion of the dielectric layer corresponding in position to the middle portion of the main surface.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 1, 2024
From: SHIMADA, YASUYUKI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 066624/0337 →
Priority Claims (1)
JP 2021-113266 · Jul 8, 2021 · national
Continuity (2)
Continuation 17833983 · Jun 7, 2022
Related Publication 20240203647A1 · Jun 20, 2024
References Cited (11)
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Shimada, “Multilayer Ceramic Capacitor”, U.S. Appl. No. 17/833,983, filed Jun. 7, 2022. [cited by applicant]