IP Library › Granted Patent US 12,658,806
Granted Patent B2
US 12,658,806 · App. 18/605,047 · Granted Jun 16, 2026

Switch-mode power converters with demagnetization detection and methods thereof

Inventors: Qian Fang (Shanghai, CN); Yun Sun (Shanghai, CN); Tuofu Liu (Shanghai, CN); Xiuhong Zhang (Shanghai, CN); Yuan Lin (Shanghai, CN)
Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
H02M3/33523H02M1/0009H02M1/0025H02M1/0058H02M1/385H02M3/33515
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Quick Facts
Patent No.
US 12,658,806
App. No.
18/605,047
Filed
Mar 14, 2024
Granted
Jun 16, 2026
Kind
B2
Art Unit
2838
USPC
363/21.13
Abstract

Controller and method for a power converter. For example, a controller for a power converter includes: a first drive signal generator configured to generate a first drive signal to turn off a first transistor at a first time and turn on the first transistor at a second time, the first transistor being configured to receive an input voltage and related to a primary winding coupled to an auxiliary winding and a secondary winding, the secondary winding being related to an output voltage, the second time being later than the first time; a second drive signal generator configured to generate a second drive signal to turn on a second transistor at a third time, the second transistor being coupled to the first transistor and related to the primary winding, the third time being later than the first time and being earlier than the second time.

Claims (128)

1 . A controller for a power converter, the controller comprising:

a first drive signal generator configured to generate a first drive signal to turn off a first transistor at a first time and turn on the first transistor at a second time, the first transistor being configured to receive an input voltage and related to a primary winding coupled to an auxiliary winding and a secondary winding, the secondary winding being related to an output voltage, the second time being later than the first time;

a second drive signal generator configured to generate a second drive signal to turn on a second transistor at a third time, the second transistor being coupled to the first transistor and related to the primary winding, the third time being later than the first time and being earlier than the second time; and

a demagnetization detector configured to generate a demagnetization signal based at least in part on a first voltage and a second voltage and output the demagnetization signal to the second drive signal generator, the first voltage being related to the auxiliary winding, the second voltage being related to the output voltage;

wherein the demagnetization detector is further configured to:

detect an end of a demagnetization process based at least in part on the first voltage and the second voltage; and

in response to detecting the end of the demagnetization process, change the demagnetization signal from a first logic level to a second logic level;

wherein the second drive signal generator is further configured to:

in response to the demagnetization signal changing from the first logic level to the second logic level, change the second drive signal to turn off the second transistor at a fourth time, the fourth time being later than the third time and being earlier than the second time.

2 . The controller of claim 1 wherein:

the first logic level is a logic low level; and

the second logic level is a logic high level.

3 . The controller of claim 1 wherein the second drive signal generator is further configured to change the second drive signal to turn on the second transistor at a fifth time, the fifth time being later than the fourth time and being earlier than the second time.

4 . The controller of claim 3 , and further comprising:

a first controller configured to generate a first control signal and output the first control signal to the second drive signal generator;

wherein the second drive signal generator is further configured to:

in response to the first control signal changing from the first logic level to the second logic level, change the second drive signal to turn off the second transistor at a sixth time, the sixth time being later than the fifth time and being earlier than the second time.

5 . The controller of claim 1 wherein the demagnetization detector is further configured to generate the demagnetization signal based at least in part on the first voltage, the second voltage and an adjustment signal and output the demagnetization signal to the second drive signal generator.

6 . The controller of claim 5 wherein the demagnetization detector is further configured to:

detect the end of the demagnetization process based at least in part on the first voltage, the second voltage and the adjustment signal; and

in response to detecting the end of the demagnetization process, change the demagnetization signal from the first logic level to the second logic level.

7 . The controller of claim 5 wherein the demagnetization detector includes:

a sampling unit configured to receive the first voltage and generate a sampled voltage based at least in part on the first voltage;

a voltage-controlled current source configured to receive the sampled voltage and the adjustment signal and generate a current based at least in part on the sampled voltage and the adjustment signal;

a first switch coupled to the voltage-controlled current source;

a capacitor coupled to the first switch and configured to generate a third voltage;

a comparator configured to receive the second voltage and the third voltage and generate the demagnetization signal based at least in part on the second voltage and the third voltage; and

a second switch coupled to the first switch and the capacitor.

8 . The controller of claim 7 wherein the sampling unit is further configured to generate the sampled voltage to represent the first voltage during the demagnetization process.

9 . The controller of claim 8 wherein the voltage-controlled current source is further configured to:

receive the sampled voltage and the adjustment signal;

determine a conversion value based at least in part on the adjustment signal; and

generate the current that is equal to the sampled voltage multiplied by the conversion value.

10 . The controller of claim 9 wherein the voltage-controlled current source is further configured to change the conversion value in response to a change in the adjustment signal.

11 . The controller of claim 9 wherein:

when the first switch is closed and the second switch is open, the capacitor is configured to be charged by the current to increase the third voltage.

12 . The controller of claim 11 wherein the comparator is further configured to:

in response to the third voltage becoming larger than the second voltage, change the demagnetization signal from the first logic level to the second logic level to turn off the second transistor at the fourth time.

13 . The controller of claim 12 wherein:

when the second switch is closed and the first switch is open, the capacitor is configured to be discharged to decrease the third voltage.

14 . The controller of claim 1 wherein the demagnetization detector includes:

a sampling unit configured to receive the first voltage and generate a first sampled voltage and a second sampled voltage based at least in part on the first voltage;

a first voltage-controlled current source configured to receive the first sampled voltage and generate a first current based at least in part on the first sampled voltage;

a first switch coupled to the first voltage-controlled current source;

a first capacitor coupled to the first switch and configured to generate a third voltage;

a computation unit configured to receive the second voltage and the third voltage and generate a conversion signal based at least in part on the second voltage and the third voltage; and

a second switch coupled to the first switch and the first capacitor.

15 . The controller of claim 14 wherein the demagnetization detector further includes:

a second voltage-controlled current source configured to receive the second sampled voltage and the conversion signal and generate a second current based at least in part on the second sampled voltage and the conversion signal;

a third switch coupled to the second voltage-controlled current source;

a second capacitor coupled to the third switch and configured to generate a fourth voltage;

a comparator configured to receive the second voltage and the fourth voltage and generate the demagnetization signal based at least in part on the second voltage and the fourth voltage; and

a fourth switch coupled to the third switch and the second capacitor.

16 . The controller of claim 15 wherein the sampling unit is further configured to:

generate the first sampled voltage to represent the first voltage when the first transistor is turned on; and

generate the second sampled voltage to represent the first voltage during the demagnetization process.

17 . The controller of claim 16 wherein the first voltage-controlled current source is further configured to:

receive the first sampled voltage; and

generate the first current that is equal to the first sampled voltage multiplied by a first predetermined constant.

18 . The controller of claim 15 wherein the second voltage-controlled current source is further configured to:

receive the second sampled voltage and the conversion signal; and

generate the second current that is equal to the second sampled voltage multiplied by the magnitude of the conversion signal.

19 . The controller of claim 15 wherein:

when the third switch is closed and the fourth switch is open, the second capacitor is configured to be charged by the second current to increase the fourth voltage.

20 . The controller of claim 19 wherein the comparator is further configured to:

in response to the fourth voltage becoming larger than the second voltage, change the demagnetization signal from the first logic level to the second logic level to turn off the second transistor at the fourth time.

21 . The controller of claim 15 wherein:

when the fourth switch is closed and the third switch is open, the second capacitor is configured to be discharged to decrease the fourth voltage.

22 . The controller of claim 14 wherein:

when the first switch is closed and the second switch is open, the first capacitor is configured to be charged by the first current to increase the third voltage.

23 . The controller of claim 22 wherein the computation unit is further configured to:

receive the second voltage and the third voltage; and

generate the conversion signal with a magnitude that is equal to a second predetermined constant multiplied by a ratio of the second voltage to the third voltage.

24 . The controller of claim 14 wherein:

when the second switch is closed and the first switch is open, the first capacitor is configured to be discharged to decrease the third voltage.

25 . A controller for a power converter, the controller comprising:

a first drive signal generator configured to generate a first drive signal to turn off a first transistor at a first time and turn on the first transistor at a second time, the first transistor being configured to receive an input voltage and related to a primary winding coupled to an auxiliary winding and a secondary winding, the secondary winding being related to an output voltage, the second time being later than the first time;

a second drive signal generator configured to generate a second drive signal to turn on a second transistor at a third time, the second transistor being coupled to the first transistor and related to the primary winding, the third time being later than the first time and being earlier than the second time; and

a demagnetization detector configured to generate a demagnetization signal based at least in part on a first voltage and a second voltage and output the demagnetization signal to the second drive signal generator, the first voltage being related to the auxiliary winding, the second voltage being related to the output voltage;

wherein the demagnetization detector is further configured to:

detect an end of a demagnetization process based at least in part on the first voltage and the second voltage; and

in response to detecting the end of the demagnetization process, change the demagnetization signal from a first logic level to a second logic level at a fourth time, the fourth time being later than the third time and being earlier than the second time;

wherein the second drive signal generator is further configured to:

in response to the demagnetization signal changing from the first logic level to the second logic level at the fourth time, change the second drive signal to turn off the second transistor at a fifth time, the fifth time being later than the fourth time and being earlier than the second time.

26 . The controller of claim 25 wherein:

the first logic level is a logic low level; and

the second logic level is a logic high level.

27 . The controller of claim 25 wherein the demagnetization detector is further configured to generate the demagnetization signal based at least in part on the first voltage, the second voltage and an adjustment signal and output the demagnetization signal to the second drive signal generator.

28 . The controller of claim 27 wherein the demagnetization detector is further configured to:

detect the end of the demagnetization process based at least in part on the first voltage, the second voltage and the adjustment signal; and

in response to detecting the end of the demagnetization process, change the demagnetization signal from the first logic level to the second logic level at the fourth time.

29 . A method for a power converter, the method comprising:

generating a first drive signal to turn off a first transistor at a first time, the first transistor being configured to receive an input voltage and related to a primary winding coupled to an auxiliary winding and a secondary winding, the secondary winding being related to an output voltage;

changing the first drive signal to turn on the first transistor at a second time, the second time being later than the first time;

generating a second drive signal to turn on a second transistor at a third time, the second transistor being coupled to the first transistor and related to the primary winding, the third time being later than the first time and being earlier than the second time;

generating a demagnetization signal based at least in part on a first voltage and a second voltage, the first voltage being related to the auxiliary winding, the second voltage being related to the output voltage; and

in response to the demagnetization signal changing from a first logic level to a second logic level, changing the second drive signal to turn off the second transistor at a fourth time, the fourth time being later than the third time and being earlier than the second time;

wherein the generating a demagnetization signal based at least in part on a first voltage and a second voltage includes:

detecting an end of a demagnetization process based at least in part on the first voltage and the second voltage; and

in response to detecting the end of the demagnetization process, changing the demagnetization signal from the first logic level to the second logic level.

30 . The method of claim 29 wherein:

the first logic level is a logic low level; and

the second logic level is a logic high level.

31 . The method of claim 29 , and further comprising:

changing the second drive signal to turn on the second transistor at a fifth time, the fifth time being later than the fourth time and being earlier than the second time.

32 . The method of claim 31 , and further comprising:

changing a first control signal from the first logic level to the second logic level; and

in response, changing the second drive signal to turn off the second transistor at a sixth time, the sixth time being later than the fifth time and being earlier than the second time.

33 . The method of claim 29 wherein the generating a demagnetization signal based at least in part on a first voltage and a second voltage includes generating the demagnetization signal based at least in part on the first voltage, the second voltage and an adjustment signal.

34 . The method of claim 33 wherein the generating the demagnetization signal based at least in part on the first voltage, the second voltage and an adjustment signal includes:

detecting the end of the demagnetization process based at least in part on the first voltage, the second voltage and the adjustment signal; and

in response to detecting the end of the demagnetization process, changing the demagnetization signal from the first logic level to the second logic level.

35 . A method for a power converter, the method comprising:

generating a first drive signal to turn off a first transistor at a first time, the first transistor being configured to receive an input voltage and related to a primary winding coupled to an auxiliary winding and a secondary winding, the secondary winding being related to an output voltage;

changing the first drive signal to turn on the first transistor at a second time, the second time being later than the first time;

generating a second drive signal to turn on a second transistor at a third time, the second transistor being coupled to the first transistor and related to the primary winding, the third time being later than the first time and being earlier than the second time;

generating a demagnetization signal based at least in part on a first voltage and a second voltage, the first voltage being related to the auxiliary winding, the second voltage being related to the output voltage; and

in response to the demagnetization signal changing from a first logic level to a second logic level at a fourth time, changing the second drive signal to turn off the second transistor at a fifth time, the fourth time being later than the third time and being earlier than the second time, the fifth time being later than the fourth time and being earlier than the second time;

wherein the generating a demagnetization signal based at least in part on a first voltage and a second voltage includes:

detecting an end of a demagnetization process based at least in part on the first voltage and the second voltage; and

in response to detecting the end of the demagnetization process, changing the demagnetization signal from the first logic level to the second logic level at the fourth time.

36 . The method of claim 35 wherein:

the first logic level is a logic low level; and

the second logic level is a logic high level.

37 . The method of claim 35 wherein the generating a demagnetization signal based at least in part on a first voltage and a second voltage includes generating the demagnetization signal based at least in part on the first voltage, the second voltage and an adjustment signal.

38 . The method of claim 37 wherein the generating the demagnetization signal based at least in part on the first voltage, the second voltage and an adjustment signal includes:

detecting the end of the demagnetization process based at least in part on the first voltage, the second voltage and the adjustment signal; and

in response to detecting the end of the demagnetization process, changing the demagnetization signal from the first logic level to the second logic level at the fourth time.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2024
From: FANG, QIAN; SUN, YUN; LIU, TUOFU; ZHANG, XIUHONG; LIN, YUAN
To: ON-BRIGHT ELECTRONICS (SHANGHAI) CO., LTD.
Reel/Frame 067295/0346 →
Priority Claims (2)
CN 202310245305.8 · Mar 14, 2023 · national
CN 202310246278.6 · Mar 14, 2023 · national
Continuity (1)
Related Publication 20240322695A1 · Sep 26, 2024
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