Granted Patent B2

US 12,362,650 · App. 18/118,003 · Granted Jul 15, 2025

Inventors: Qian Fang (Shanghai, CN); Yun Sun (Shanghai, CN); Lieyi Fang (Shanghai, CN)

Assignee: On-Bright Electronics (Shanghai) Co., Ltd.

H02M1/083H02M1/0009H02M3/33571

Abstract

Claims (123)

1. A controller for a power converter, the controller comprising:

a first drive signal generator configured to generate a first drive signal and output the first drive signal to a first transistor configured to receive an input voltage and related to a primary winding coupled to an auxiliary winding and a secondary winding related to an output voltage;

a second drive signal generator configured to generate a second drive signal and output the second drive signal to a second transistor coupled to the first transistor and related to the primary winding;

a demagnetization detector configured to generate a demagnetization signal based at least in part on a first voltage related to the auxiliary winding, the demagnetization signal indicating an end of a demagnetization process; and

a first controller configured to generate a first control signal based at least in part on the demagnetization signal and a first current related to the auxiliary winding;

wherein the second drive signal generator is further configured to:

receive the first control signal; and

generate the second drive signal based at least in part on the first control signal;

wherein the first controller is further configured to:

determine a time duration that starts at the end of the demagnetization process based at least in part on the first current; and

at an end of the time duration, change the first control signal to turn off the second transistor;

wherein:

if the output voltage is constant, the time duration is directly proportional to the input voltage minus the output voltage multiplied by a ratio; and

the ratio is equal to a first number of turns of the primary winding divided by a second number of turns of the secondary winding.

2. The controller of claim 1 , and further comprising:

a second controller configured to:

generate a second control signal and a third control signal;

output the second control signal to the first drive signal generator; and

output the third control signal to the second drive signal generator.

3. The controller of claim 2 wherein the second controller is further configured to:

a first predetermined delay after the first drive signal changes to turn off the first transistor, change the third logic signal to turn on the second transistor; and

a second predetermined delay after the second drive signal changes to turn off the second transistor, change the second logic signal to turn on the first transistor.

4. The controller of claim 3 wherein the first predetermined delay and the second predetermined delay are not equal in length.

5. The controller of claim 1 wherein the demagnetization detector is further configured to, at the end of the demagnetization process, change the demagnetization signal to indicate the end of the demagnetization process.

6. The controller of claim 1 , and further comprising:

a comparator configured to:

receive a second voltage and a third voltage, the second voltage representing a second current flowing through the primary winding, the third voltage being related to the output voltage; and

generate a comparison signal based at least in part on the second voltage and the third voltage.

7. The controller of claim 6 wherein the first drive signal generator is further configured to receive the comparison signal and generate the first drive signal based at least in part on the comparison signal.

8. The controller of claim 7 wherein the comparator is further configured to, if the second voltage becomes larger than the third voltage, change the comparison signal to turn off the first transistor.

9. A controller for a power converter, the controller comprising:

a first drive signal generator configured to generate a first drive signal and output the first drive signal to a first transistor configured to receive an input voltage and related to a primary winding coupled to a secondary winding and an auxiliary winding;

a second drive signal generator configured to generate a second drive signal and output the second drive signal to a second transistor coupled to the first transistor and related to the primary winding;

a frequency controller configured to generate a frequency control signal; and

a first controller configured to generate a first control signal based at least in part on the frequency control signal and a first current related to the auxiliary winding;

wherein the second drive signal generator is further configured to:

receive the first control signal; and

generate the second drive signal based at least in part on the first control signal;

wherein the first controller is further configured to:

determine a time duration that starts at a time when the frequency control signal changes; and

at an end of the time duration, change the first control signal to turn off the second transistor;

wherein:

if the output voltage is constant, the time duration is directly proportional to the input voltage minus the output voltage multiplied by a ratio; and

the ratio is equal to a first number of turns of the primary winding divided by a second number of turns of the secondary winding.

10. The controller of claim 9 , and further comprising:

a second controller configured to:

generate a second control signal and a third control signal;

output the second control signal to the first drive signal generator; and

output the third control signal to the second drive signal generator.

11. The controller of claim 10 wherein the second controller is further configured to:

a first predetermined delay after the first drive signal changes to turn off the first transistor, change the third logic signal to turn on the second transistor; and

a second predetermined delay after the second drive signal changes to turn off the second transistor, change the second logic signal to turn on the first transistor.

12. The controller of claim 11 wherein the first predetermined delay and the second predetermined delay are not equal in length.

13. The controller of claim 9 wherein the first controller is further configured to determine the time duration that starts at the time when the frequency control signal changes from a logic low level to a logic high level.

14. The controller of claim 9 , and further comprising:

a comparator configured to:

receive a second voltage and a third voltage, the second voltage representing a second current flowing through the primary winding, the third voltage being related to the output voltage; and

generate a comparison signal based at least in part on the second voltage and the third voltage.

15. The controller of claim 14 wherein the first drive signal generator is further configured to receive the comparison signal and generate the first drive signal based at least in part on the comparison signal.

16. The controller of claim 15 wherein the comparator is further configured to, if the second voltage becomes larger than the third voltage, change the comparison signal to turn off the first transistor.

17. A method for a power converter, the method comprising:

generating a first drive signal;

outputting the first drive signal to a first transistor configured to receive an input voltage and related to a primary winding coupled to an auxiliary winding and a secondary winding related to an output voltage;

generating a second drive signal;

outputting the second drive signal to a second transistor coupled to the first transistor and related to the primary winding;

generating a demagnetization signal based at least in part on a first voltage related to the auxiliary winding, the demagnetization signal indicating an end of a demagnetization process; and

generating a first control signal based at least in part on the demagnetization signal and a first current related to the auxiliary winding;

wherein the generating a second drive signal includes:

receiving the first control signal; and

generating the second drive signal based at least in part on the first control signal;

wherein the generating a first control signal based at least in part on the demagnetization signal and a first current includes:

determining a time duration that starts at the end of the demagnetization process based at least in part on the first current; and

at an end of the time duration, changing the first control signal to turn off the second transistor;

wherein:

if the output voltage is constant, the time duration is directly proportional to the input voltage minus the output voltage multiplied by a ratio; and

the ratio is equal to a first number of turns of the primary winding divided by a second number of turns of the secondary winding.

18. The method of claim 17 wherein:

the generating a second drive signal includes:

a first predetermined delay after the first drive signal changes to turn off the first transistor, changing the second drive signal to turn on the second transistor;

the generating a first drive signal includes:

a second predetermined delay after the second drive signal changes to turn off the second transistor, changing the first drive signal to turn on the first transistor.

19. The method of claim 18 wherein the first predetermined delay and the second predetermined delay are not equal in length.

20. The method of claim 17 wherein the generating a demagnetization signal based at least in part on a first voltage includes, at the end of the demagnetization process, changing the demagnetization signal to indicate the end of the demagnetization process.

21. The method of claim 17 , and further comprising:

receiving a second voltage and a third voltage, the second voltage representing a second current flowing through the primary winding, the third voltage being related to the output voltage; and

generating a comparison signal based at least in part on the second voltage and the third voltage.

22. The method of claim 21 wherein the generating a first drive signal includes:

receiving the comparison signal; and

generating the first drive signal based at least in part on the comparison signal.

23. The method of claim 22 wherein the generating the first drive signal based at least in part on the comparison signal includes:

if the second voltage becomes larger than the third voltage, changing the comparison signal to turn off the first transistor.

24. A method for a power converter, the method comprising:

generating a first drive signal;

outputting the first drive signal to a first transistor configured to receive an input voltage and related to a primary winding coupled to a secondary winding and an auxiliary winding;

generating a second drive signal;

outputting the second drive signal to a second transistor coupled to the first transistor and related to the primary winding;

generating a frequency control signal; and

generating a first control signal based at least in part on the frequency control signal and a first current related to the auxiliary winding;

wherein the generating a second drive signal includes:

receiving the first control signal; and

generating the second drive signal based at least in part on the first control signal;

wherein the generating a first control signal based at least in part on the frequency control signal and a first current includes:

determining a time duration that starts at a time when the frequency control signal changes; and

at an end of the time duration, changing the first control signal to turn off the second transistor;

wherein:

if the output voltage is constant, the time duration is directly proportional to the input voltage minus the output voltage multiplied by a ratio; and

the ratio is equal to a first number of turns of the primary winding divided by a second number of turns of the secondary winding.

25. The method of claim 24 wherein:

the generating a second drive signal includes:

a first predetermined delay after the first drive signal changes to turn off the first transistor, changing the second drive signal to turn on the second transistor;

the generating a first drive signal includes:

a second predetermined delay after the second drive signal changes to turn off the second transistor, change the first drive signal to turn on the first transistor.

26. The method of claim 25 wherein the first predetermined delay and the second predetermined delay are not equal in length.

27. The method of claim 24 wherein the determining a time duration that starts at a time when the frequency control signal changes includes:

determining the time duration that starts at the time when the frequency control signal changes from a logic low level to a logic high level.

28. The method of claim 24 , and further comprising:

receiving a second voltage and a third voltage, the second voltage representing a second current flowing through the primary winding, the third voltage being related to the output voltage; and

generating a comparison signal based at least in part on the second voltage and the third voltage.

29. The method of claim 28 wherein the generating a first drive signal includes:

receiving the comparison signal; and

generating the first drive signal based at least in part on the comparison signal.

30. The method of claim 29 wherein the generating the first drive signal based at least in part on the comparison signal includes:

if the second voltage becomes larger than the third voltage, changing the comparison signal to turn off the first transistor.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (41)

Cited By (1)

US 12,658,806