Fabrication of nano-sheet transistors with different threshold voltages
A method of forming two or more nano-sheet devices with varying electrical gate lengths, including, forming at least two cut-stacks including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate, removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers, and removing a portion of the at least one alternating nano-sheet channel layer to form a recess having a recess depth in the at least one alternating nano-sheet channel layers, where the recess depth is greater than the indentation depth.
1 . A method of forming two or more nano-sheet devices with varying channel lengths, comprising:
forming at least two cut-stacks including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate;
removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers;
removing a portion of the at least one alternating nano-sheet channel layer in a first of the at least two cut-stacks to form a first recess having a first recess depth in the at least one alternating nano-sheet channel layer; and
removing a portion of the at least one alternating nano-sheet channel layer in a second of the at least two cut-stacks to provide two different channel lengths.
2 . The method of claim 1 , further comprising forming the plurality of sacrificial release layers and the at least one alternating nano-sheet channel layer on the substrate by an epitaxially growth process, patterning and etching the plurality of sacrificial release layers and the at least one alternating nano-sheet channel layer to form a channel stack, and forming a dummy gate on the channel stack.
3 . The method of claim 2 , wherein the at least two cut-stacks are formed from the same channel stack.
4 . The method of claim 1 , further comprising forming a mask on at least one of the at least two cut-stacks after removing a portion of the plurality of sacrificial release layers, and removing an additional portion of the plurality of sacrificial release layers from the unmasked cut-stacks.
5 . The method of claim 4 , wherein the additional portion of the plurality of sacrificial release layers is removed using an isotropic wet etch.
6 . The method of claim 1 , further comprising foaming a mask on at least one of the at least two cut-stacks before removing a portion of the at least one alternating nano-sheet channel layer to form a recess in the unmasked cut-stacks.
7 . The method of claim 6 , further comprising removing the mask from the at least one of the at least two cut-stacks after removing a portion of the at least one alternating nano-sheet channel layer, and removing a portion of the at least one alternating nano-sheet channel layer to form a recess in the previously masked at least one of the at least two cut-stacks and an additional portion of the at least one alternating nano-sheet channel layer from the unmasked at least one of the at least two cut-stacks.
8 . The method of claim 1 , further comprising forming a source/drain on each of the at least two cut-stacks.
9 . The method of claim 8 , wherein the source/drains are epitaxially grown on the exposed surfaces of the at least one alternating nano-sheet channel layer.
10 . A method of forming two or more nano-sheet devices with varying channel lengths, comprising:
forming a channel stack including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate;
forming at least two cut-stacks from the channel stack, where each of the at least two cut-stacks includes a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer;
removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers;
forming an indentation fill layer in the indentations;
forming a mask on at least one of the two or more cut-stacks; and
removing a portion of the at least one alternating nano-sheet channel layer to form a recess in the unmasked cut-stacks.
11 . The method of claim 10 , further comprising removing the mask from the at least one of the two or more cut-stacks after removing a portion of the at least one alternating nano-sheet channel layer, and removing a portion of the at least one alternating nano-sheet channel layer to form a recess in the previously masked at least one of the two or more cut-stacks and an additional portion of the at least one alternating nano-sheet channel layer from the at least one unmasked of the two or more cut-stacks.
12 . The method of claim 11 , further comprising forming a source/drain on each of the two or more cut-stacks.
13 . The method of claim 12 , further comprising forming a gate structure on each of the two or more cut-stacks.
14 . A method of forming two or more nano-sheet devices with varying channel lengths, comprising:
forming at least two cut-stacks including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate;
removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers; and
removing a portion of the at least one alternating nano-sheet channel layer to form a recess having a recess depth in the at least one alternating nano-sheet channel layer, wherein the one of the two or more nano-sheet devices has a different threshold voltage, V T , than the other of the two or more nano-sheet devices by altering the length of the at least one alternating nano-sheet channel layer.
15 . The method of claim 14 , wherein an isotropic etch forms the indentations having a predetermined indentation depth in the range of about 2 nm to about 10 nm.
16 . The method of claim 14 , wherein the sacrificial release layers have a thickness in the range of about 5 nm to about 20 nm.
17 . The method of claim 14 , wherein the sacrificial release layers are silicon-germanium (SiGe).
18 . The method of claim 14 , wherein the at least one alternating nano-sheet channel layer is epitaxially grown on a crystalline surface of the substrate.
19 . The method of claim 14 , wherein the at least one alternating nano-sheet channel layer is a single crystal silicon layer on a crystalline sacrificial release layer.
20. A pair of nano-sheet devices on a substrate, comprising:
a first nano-sheet device comprising a plurality of nano-sheet channel layers contacted on opposite ends by first source/drain regions; and
a second nano-sheet device comprising a plurality of nano-sheet channel layers contacted on opposite ends by second source/drain regions, wherein:
the first and second nano-sheet devices have substantially the same physical gate length; and
a length of a topmost nano-sheet channel layer between opposing second source/drain regions of the second nano-sheet device is greater than a length of a topmost nano-sheet channel layer between opposing first source/drain regions of the first nano-sheet device.
21. The pair of nano-sheet devices of claim 20 , wherein the topmost nano-sheet channel layer of the second nano-sheet device has a length in a range of about 20 nm to about 25 nm, and the topmost nano-sheet channel layer of the first nano-sheet device has a length in a range of about 15 nm to about 19 nm.
22. The pair of nano-sheet devices of claim 20 , wherein the topmost nano-sheet channel layers of the first and second nano-sheet devices have a difference in length in a range of about 2 nm to about 10 nm.
23. The pair of nano-sheet devices of claim 20 , wherein the topmost nano-sheet channel layers of the first and second nano-sheet devices have a difference in length in a range of about 4 nm to about 10 nm.
24. The pair of nano-sheet devices of claim 20 , wherein the topmost nano-sheet channel layers of the first and second nano-sheet devices have a difference in length in a range of about 2 nm to about 5 nm.
25. The pair of nano-sheet devices of claim 20 , wherein:
the first nano-sheet device comprises a first pair of indentation fill regions aligned with and on opposite ends of a first gate electrode region;
the second nano-sheet device comprises a second pair of indentation fill regions aligned with and on opposite ends of a second gate electrode region; and
the first gate electrode region is directly adjacent to the topmost nano-sheet channel layer of the first nano-sheet device and the second gate electrode region is directly adjacent to the topmost nano-sheet channel layer of the second nano-sheet device.
26. The pair of nano-sheet devices of claim 25 , wherein a length of the first gate electrode region between opposing first indentation fill regions of the first nano-sheet device is greater than a length of the second gate electrode region between opposing second indentation fill regions of the second nano-sheet device.
27. The pair of nano-sheet devices of claim 25 , wherein:
the first and second gate electrode regions extend laterally in a first direction;
the indentation fill regions associated with the second gate electrode region of the second nano-sheet device have a length in the first direction that is greater than a length in the first direction of the indentation fill regions associated with the first gate electrode region of the first nano-sheet device.
28. The pair of nano-sheet devices of claim 25 , wherein the indentation fill regions of the first and second nano-sheet devices have a length in a range of about 2 nm to about 10 nm.
29. The pair of nano-sheet devices of claim 25 , wherein the indentation fill regions of the first and second nano-sheet devices have a length in a range of about 2 nm to about 5 nm.
30. The pair of nano-sheet devices of claim 25 , wherein the indentation fill regions of the first and second nano-sheet devices have a length in a range of about 5 nm to about 10 nm.
31. A pair of nano-sheet devices on a substrate, comprising:
a first nano-sheet device comprising:
a first pair of indentation fill regions aligned with and on opposite ends of a first gate electrode region; and
a first topmost nano-sheet channel layer; and
a second nano-sheet device comprising:
a second pair of indentation fill regions aligned with and on opposite ends of a second gate electrode region; and
a second topmost nano-sheet channel layer, wherein:
the first and second nano-sheet devices have substantially the same physical gate length:
the first gate electrode region is directly adjacent to the first topmost nano-sheet channel layer and the second gate electrode region is directly adjacent to the second topmost nano-sheet channel layer; and
a length of the first gate electrode region between opposing first indentation fill regions of the first nano-sheet device is greater than a length of the second gate electrode region between opposing second indentation fill regions of the second nano-sheet device.
32. The pair of nano-sheet devices of claim 31 , wherein the indentation fill regions of the first and second nano-sheet devices have a length in a range of about 2 nm to about 10 nm.
33. The pair of nano-sheet devices of claim 31 , wherein the indentation fill regions of the first and second nano-sheet devices have a length in a range of about 2 nm to about 5 nm.
34. The pair of nano-sheet devices of claim 31 , wherein the indentation fill regions of the first and second nano-sheet devices have a length in a range of about 5 nm to about 10 nm.
35. The pair of nano-sheet devices of claim 31 , wherein the indentation fill regions of the first and second nano-sheet devices comprise silicon nitride (SiN).
36. The pair of nano-sheet devices of claim 31 , wherein the indentation fill regions of the first and second nano-sheet devices comprise silicon oxynitride (SiON).
37. The pair of nano-sheet devices of claim 31 , wherein the indentation fill regions of the first and second nano-sheet devices comprise silicon oxycarbide (SiOC).
38. The pair of nano-sheet devices of claim 31 , wherein the indentation fill regions of the first and second nano-sheet devices comprise silicon boro carbonitride (SiBCN).
39. The pair of nano-sheet devices of claim 31 , wherein the indentation fill regions of the first and second nano-sheet devices comprise silicon oxy carbonitride (SiOCN).