IP Library Granted Patent US 12,581,975
Granted Patent B2
US 12,581,975 · App. 18/633,941 · Granted Mar 17, 2026

Semiconductor devices and related methods

Inventors: Gyu Wan Han (Incheon, KR); Won Bae Bang (Incheon, KR); Ju Hyung Lee (Gyeonggi-Do, KR); Min Hwa Chang (Incheon, KR); Dong Joo Park (Incheon, KR); Jin Young Khim (Seoul, KR); Jae Yun Kim (Incheon, KR); Se Hwan Hong (Seoul, KR); Seung Jae Yu (Incheon, KR); Shaun Bowers (Gilbert, AZ); Gi Tae Lim (Incheon, KR); Byoung Woo Cho (Seoul, KR); Myung Jea Choi (Incheon, KR); Seul Bee Lee (Gyeonggi-Do, KR); Sang Goo Kang (Seoul, KR); Kyung Rok Park (Incheon, KR)
Assignee: Amkor Technology Singapore Holding Pte. Ltd.
H01L23/13H01L21/568H01L23/3185H01L23/49816H01L24/48H01L24/85H01L25/0657H01L25/18H01L2224/48145H01L2224/48157H01L2224/85005H01L2225/06506H01L2225/0651H01L2225/06562
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Quick Facts
Patent No.
US 12,581,975
App. No.
18/633,941
Granted
Mar 17, 2026
Kind
B2
Abstract

In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Claims (63)

1 . A semiconductor device, comprising:

a base substrate having a first side and an internal base terminal on the first side;

a first module substrate coupled to the internal base terminal, the first module substrate comprising:

a module dielectric structure;

a module conductive structure;

a first substrate side,

a second substrate side opposite the first substrate side,

a substrate sidewall between the first substrate side and the second substrate side;

a device stack coupled to the module conductive structure and comprising:

a first electronic device; and

a second electronic device stacked on the first electronic device;

an encapsulant surrounding the device stack and contacting the substrate sidewall; and

an insert comprising a non-electrically functional semiconductor material in the encapsulant, wherein a top side of the insert is coplanar with a top side of the encapsulant.

2 . The semiconductor device of claim 1 , wherein the insert comprises silicon.

3 . The semiconductor device of claim 1 , wherein:

the base substrate comprises a base conductive structure; and

comprising a third electronic device over the first side of the base substrate and coupled to the base conductive structure.

4 . The semiconductor device of claim 3 , wherein the insert is over a first side of the third electronic device.

5 . The semiconductor device of claim 1 , wherein:

the base substrate comprises a base conductive structure; and

the first electronic device and the second electronic device are coupled to the base conductive structure via the module conductive structure.

6 . The semiconductor device of claim 5 , wherein:

the module conductive structure is coupled to the base conductive structure via an interconnect between the base substrate and the first module substrate.

7 . The semiconductor device of claim 1 , wherein the encapsulant is over the first side of the base substrate and covers a lateral side of the first module substrate.

8 . The semiconductor device of claim 7 , wherein the encapsulant extends between the base substrate and the first module substrate.

9 . A method to manufacture a semiconductor device, comprising:

providing a base substrate having a first side and an internal base terminal on the first side;

providing a first module substrate coupled to the internal base terminal, the first module substrate comprising:

a module dielectric structure;

a module conductive structure;

a first substrate side,

a second substrate side opposite the first substrate side,

a substrate sidewall between the first substrate side and the second substrate side;

providing a device stack coupled to the module conductive structure and comprising:

a first electronic device; and

a second electronic device stacked on the first electronic device;

providing an insert comprising a non-electrically functional semiconductor material; and

providing an encapsulant surrounding the device stack and contacting the substrate sidewall;

wherein the insert is in the encapsulant, and a top side of the insert is coplanar with a top side of the encapsulant.

10 . The method of claim 9 , wherein the insert comprises silicon.

11 . The method of claim 9 , wherein:

the base substrate comprises a base conductive structure; and

comprising providing a third electronic device over the first side of the base substrate and coupled to the base conductive structure.

12 . The method of claim 11 , wherein the insert is over a first side of the third electronic device.

13 . The method of claim 9 , wherein:

the base substrate comprises a base conductive structure; and

the first electronic device and the second electronic device are coupled to the base conductive structure via the module conductive structure.

14 . The method of claim 13 , wherein:

the module conductive structure is coupled to the base conductive structure via an interconnect between the base substrate and the first module substrate.

15 . The method of claim 9 , wherein the encapsulant is over the first side of the base substrate and covers a lateral side of the first module substrate.

16 . The method of claim 15 , wherein the encapsulant extends between the base substrate and the first module substrate.

17 . A semiconductor device, comprising:

a base substrate comprising a first side and a base conductive structure;

a module substrate over the first side of the base substrate and comprising a module conductive structure;

a first electronic device coupled to the module conductive structure via a first interconnect;

an encapsulant over the first side of the base substrate and covering a lateral side of the module substrate;

a second interconnect in the encapsulant and coupled to the module conductive structure and the base conductive structure; and

a semiconductor insert over the first side of the base substrate and contacting the encapsulant.

18 . The semiconductor device of claim 17 , wherein the semiconductor insert comprises silicon.

19 . The semiconductor device of claim 17 , comprising:

a second electronic device coupled to the base conductive structure;

wherein the semiconductor insert is over the second electronic device.

20 . The semiconductor device of claim 19 , wherein the encapsulant is between the second electronic device and the first side of the base substrate.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2024
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
Reel/Frame 067438/0241 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2024
From: AMKOR TECHNOLOGY KOREA, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
Reel/Frame 067438/0400 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2024
From: BOWERS, SHAUN
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 067092/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2024
From: HAN, GYU WAN; BANG, WON BAE; LEE, JU HYUNG; CHANG, MIN HWA; PARK, DONG JOO; KHIM, JIN YOUNG; KIM, JAE YUN; HONG, SE HWAN; YU, SEUNG JAE; LIM, GI TAE; CHO, BYOUNG WOO; CHOI, MYUNG JEA; LEE, SEUL BEE; KANG, SANG GOO; PARK, KYUNG ROK
To: AMKOR TECHNOLOGY KOREA, INC.
Reel/Frame 067092/0480 →
Continuity (5)
Continuation 17982713 · Nov 8, 2022
Continuation 17018434 · Sep 11, 2020
Continuation In Part 16429553 · Jun 3, 2019
Provisional Application 62902473 · Sep 19, 2019
Related Publication 20240258182A1 · Aug 1, 2024
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