Hybrid digital delay beamforming circuits and methods
An integrated circuit may include a phase shifting/partial beamforming network circuit and a plurality of true time delay (TTD) circuits. The beamforming circuit may include a plurality of receive inputs. Each receive input may be coupled to one of a plurality of antenna elements. The beamforming circuit may include a plurality of receive/transmit connectors, each of which may correspond to a beam of a plurality of beams. The beamforming circuit may include a plurality of transmit outputs each of which may be coupled to one of the plurality of antenna elements. Each TTD circuit may include a first connection coupled to one of the receive/transmit connector outputs and a second connection coupled to one of a plurality of serial lines. Each TTD circuit may be configured to apply one or more of an integer delay or a fractional delay to data received from the receive/transmit connector or the serial line.
1 . A system comprising:
an integrated circuit comprises:
a phase shifting/partial beamforming network (PSPBN) circuit including:
a plurality of first connectors, each first connector coupled to and configured to receive a signal from one of a plurality of antenna elements;
a plurality of second connectors, each second connector corresponding to a beam of a plurality of beams; and
circuitry configured to separate the signal into a plurality of antenna/beam signals in response to receiving signals at the plurality of antenna elements, each antenna/beam signal corresponding to a beam of a plurality of beams, the circuitry configured to multiply each antenna/beam signal by a phasor to produce an adjusted antenna/beam signal, combine the adjusted antenna/beam signals from each input to produce a partial beam output signal for each of the plurality of beams, and provide each partial beam output signal to one of the plurality of second connectors; and
a plurality of true time delay (TTD) circuits, each TTD circuit including a first connector coupled to one of the plurality of second connectors of the PSPBN and including a second connector, each TTD circuit configured to apply a true time delay to the partial beam output signal at the one of a plurality of outputs of the PSPBN to produce a delayed partial beam output signal and to provide the delayed partial beam output signal to the second connector of the TTD circuit; and
an adder network coupled to the second connector of each TTD circuit and configured to accumulate the delayed partial beam output signals for each beam.
2 . The system of claim 1 , wherein each TTD is configured to apply one or more of an integer delay or a fractional delay to the partial beam output signal to produce the delayed partial beam output signal.
3 . The system of claim 1 , wherein the integrated circuit further includes a serializer/deserializer (SERDES) logic configured to couple the integrated circuit to one or more adjacent integrated circuits via a SERDES network and coupled to the adder network.
4 . The system of claim 3 , further comprising:
a plurality of bypass circuits, each bypass circuit including a first connector coupled to one of the plurality of second connectors of the PSPBN, a second connector coupled to the SERDES logic, and a control terminal; and
wherein a controller coupled to the control terminals of each of the plurality of bypass circuits, the controller configured to selectively provide a control signal to the control terminals to activate the plurality of bypass circuits when a steering angle of a signal received by the plurality of antenna elements is within a threshold range of angles.
5 . The system of claim 3 , wherein, in a transmit mode, the circuitry is configured to:
receive beam signals from one of the SERDES logic or the plurality of TTD circuits;
separate each beam signal into a plurality of beam/antenna signals, each beam/antenna signal corresponding to an antenna element of a plurality of antenna elements;
multiply each beam/antenna signal by a phasor to produce an adjusted beam/antenna signal;
combine the adjusted beam/antenna signals for each antenna element to produce an antenna output signal for each of the plurality of antenna elements; and
provide the antenna output signals to the plurality of antenna elements.
6 . A system comprises:
an integrated circuit comprising:
a phase shifting/partial beamforming network (PSPBN) circuit including a plurality of first connectors and a plurality of second connectors, each first connector coupled to one of a plurality of antenna elements, each second connector corresponding to a beam of a plurality of beams;
an adder network configured to accumulate partial beam signals for each beam;
a serializer/deserializer (SERDES) logic coupled to the adder network;
a plurality of true time delay (TTD) circuits, each TTD circuit coupled to one of the plurality of second connectors, the adder network, and the SERDES logic and configured to apply a true time delay to a signal from one of the second connectors or the SERDES logic; and
a plurality of bypass circuits, each bypass circuit including a first terminal coupled to one of the second connectors, a second connector coupled to one of the adder network or the SERDES logic, and a control terminal responsive to a control signal from a controller to selectively couple the PSPBN circuit to the one of the adder network or the SERDES logic to bypass the TTD circuits without applying the true time delays.
7 . The system of claim 6 , wherein, in a receive mode, the PSPBN circuit is configured to:
receive a signal from each of the plurality of antenna elements;
separate each signal into a plurality of antenna/beam signals, each antenna/beam signal corresponding to a beam of a plurality of beams;
multiply each antenna/beam signal by a phasor to produce an adjusted antenna/beam signal;
combine the adjusted antenna/beam signals for each beam to produce a partial beam output signal for each of the plurality of beams; and
provide each partial beam output signal to one of the plurality of second connectors.
8 . The system of claim 7 , wherein the controller is configured to selectively activate the plurality of bypass circuits when a steering angle of a source of the signals received by the plurality of antenna elements is within a threshold range of angles.
9 . The system of claim 7 , wherein the adder network is configured to accumulate the partial beam output signals from the PSPBN circuit and from other integrated circuits coupled to the integrated circuit.
10 . The system of claim 7 , wherein each of the plurality of TTD circuits is configured to apply one or more of an integer delay or a fractional delay to the partial beam output signal and to provide the delayed partial beam output signal to the SERDES logic.
11 . The system of claim 6 , wherein, in a transmit mode, the PSPBN circuit is configured to:
receive beam signals from one of the SERDES logic or the plurality of TTD circuits;
separate each beam signal into a plurality of beam/antenna signals, each beam/antenna signal corresponding to an antenna element of a plurality of antenna elements;
multiply each beam/antenna signal by a phasor to produce an adjusted beam/antenna signal;
combine the adjusted beam/antenna signals for each antenna element to produce an antenna output signal for each of the plurality of antenna elements; and
provide the antenna output signals to the plurality of antenna elements.
12 . The system of claim 10 , wherein the controller is configured to selectively activate the plurality of bypass circuits when a steering angle of a target for the signals to be transmitted by the plurality of antenna elements is within a threshold range of angles.
13 . The system of claim 10 , wherein each of the plurality of TTD circuits is configured to apply one or more of an integer delay or a fractional delay to a beam signal from the SERDES logic and to provide the delayed beam signal to the PSPBN circuit.
14 . A method of hybrid digital beamforming, the method comprising:
receiving, at a phase shifting/partial beamforming network (PSPBN) circuit, a plurality of beams corresponding to radio frequency (RF) signals from a plurality of antenna elements; and
determining a steering angle of a source of the RF signals received by the plurality of antenna elements;
when the steering angle is outside of a threshold range of angles, determining a true time delay using a plurality of true time delay (TTD) circuits and applying the true time delay to one or more of the plurality of beams; and
when the steering angle is within a threshold range of angles, selectively coupling the PSPBN circuit to one of an adder network or a serializer/deserializer (SERDES) logic circuit coupled to the adder network to bypass the plurality of TTD circuits without applying the true time delays.
15 . The method of claim 14 , wherein receiving at the PSPBN circuit comprises:
receiving a signal from each of the plurality of antenna elements;
separating each signal into a plurality of antenna-beam signals, each antenna-beam signal corresponding to a beam of a plurality of beams;
multiplying each antenna/beam signal by a phasor to produce an adjusted antenna-beam signal;
combining the adjusted antenna-beam signals for each beam to produce a partial beam output signal for each of the plurality of beams; and
providing each partial beam output signal to one of the plurality of antenna elements.
16 . The method of claim 15 , further comprising accumulating the partial beam output signals from the PSPBN circuit.
17 . The method of claim 16 , further comprising:
applying one or more of an integer delay or a fractional delay to each partial beam output signal; and
providing the delayed partial beam output signals to the serializer/deserializer (SERDES) logic circuit.
18 . The method of claim 14 , wherein, in a transmit mode, the method comprises:
receiving beam signals from one of the SERDES logic circuits or the plurality of TTD circuits;
separating each beam signal into a plurality of beam-antenna signals, each beam-antenna signal corresponding to an antenna element of the plurality of antenna elements;
multiplying each beam/antenna signal by a phasor to produce an adjusted beam-antenna signal;
combining the adjusted beam-antenna signals for each antenna element to produce an antenna output signal for each of the plurality of antenna elements; and providing the antenna output signals to the plurality of antenna elements.
19 . The method of claim 14 , further comprising selectively activating a plurality of bypass circuits when a steering angle of a source of the signals received by the plurality of antenna elements is within a threshold range of angles.
20 . The method of claim 18 , further comprising selectively bypassing the plurality of TTD circuits when a steering angle of a target for the signals to be transmitted by the plurality of antenna elements is within a threshold range of angles.