IP Library › Granted Patent US 10,411,348
Granted Patent B2
US 10,411,348 · App. 15/868,953 · Granted Sep 10, 2019

Phase shifting device

Inventors: Jinseok Park (Daejeon, KR); Song-Cheoll Hong (Daejeon, KR); Seung Hoon Kang (Daejeon, KR); Jaehoon Chung (Seoul, KR); Minki Ahn (Seoul, KR)
Assignees: LG ELECTRONICS INC.; KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
H01Q3/34H01P1/18H03H11/20
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Quick Facts
Patent No.
US 10,411,348
App. No.
15/868,953
Granted
Sep 10, 2019
Kind
B2
Abstract

Provided is a phase shifting device including a first balun outputting first and second differential input signals, an I/Q generator outputting first to fourth phase signals based on the first and second differential input signals, a control circuit outputting a first control signal, a second control signal, a plurality of in-phase select signals, and a plurality of quadrature select signals, a current source circuit including a first source transistor outputting an in-phase current according to the first control signal and a second source outputting a quadrature current according to the second control signal, a vector sum circuit outputting first and second differential output signals based on the first to fourth phase signals according to the plurality of in-phase select signals and the plurality of quadrature select signals and including a plurality of sub-vector sum circuits, and a second balun outputting an output signal.

Claims (51)

1. A phase shifting device comprising:

a first balun outputting first and second differential input signals based on an input signal;

an I/Q generator outputting first to fourth phase signals based on the first and second differential input signals;

a control circuit outputting a first control signal, a second control signal, a plurality of in-phase select signals, and a plurality of quadrature select signals;

a current source circuit including a first source transistor outputting an in-phase current according to the first control signal and a second source transistor outputting a quadrature current according to the second control signal;

a vector sum circuit including a plurality of sub-vector sum circuits and outputting first and second differential output signals based on the first to fourth phase signals according to the plurality of in-phase select signals and the plurality of quadrature select signals; and

a second balun outputting an output signal based on the first and second differential output signals.

2. The phase shifting device of claim 1 , wherein

the control circuit uniformly maintains a magnitude of a signal obtained by adding the in-phase current and the quadrature current based on the in-phase control signal and the quadrature control signal.

3. The phase shifting device of claim 1 , wherein

a vector obtained by adding the in-phase current and the quadrature current is the same in size and opposite in direction with a vector obtained by adding the first differential output signal and the second differential output signal.

4. The phase shifting device of claim 1 , wherein

the vector sum circuit includes:

a first sub-vector sum circuit outputting a signal generated based on a first in-phase select signal, a first quadrature select signal, and the first to fourth phase signals to the second balun through first and second output terminals;

a second sub-vector sum circuit outputting a signal generated based on a second in-phase select signal, a second quadrature select signal, and the first to fourth phase signals to the second balun through third and fourth output terminals; and

a third sub-vector sum circuit outputting a signal generated based on a third in-phase select signal, a third quadrature select signal, and the first to fourth phase signals to the second balun through fifth and sixth output terminals.

5. The phase shifting device of claim 4 , wherein

the first sub-vector sum circuit includes:

a first transistor having one end connected to the first output terminal and having a gate to which the first phase signal is applied;

a second transistor having one end connected to the second output terminal and having a gate to which the second phase signal is applied;

a third transistor having one end connected to the first output terminal and having a gate to which the second phase signal is applied;

a fourth transistor having one end connected to the second output terminal and having a gate to which the first phase signal is applied;

a first inverter outputting a first in-phase inversion select signal obtained by inverting the first in-phase select signal;

a first selection transistor having one end connected to the other ends of the first and second transistors and the other end connected to one end of the first source transistor, and turned on according to the first in-phase select signal applied to a gate thereof; and

a second selection transistor having one end connected to the other ends of the third and fourth transistors and the other end connected to the one end of the first source transistor, and turned on according to the first in-phase inversion select signal applied to a gate thereof.

6. The phase shifting device of claim 5 , wherein

the first sub-vector sum circuit includes:

a fifth transistor having one end connected to the first output terminal and having a gate to which the third phase signal is applied;

a sixth transistor having one end connected to the second output terminal and having a gate to which the fourth phase signal is applied;

a seventh transistor having one end connected to the first output terminal and having a gate to which the fourth phase signal is applied;

an eighth transistor having one end connected to the second output terminal and having a gate to which the third phase signal is applied;

a second inverter outputting a first quadrature inversion select signal obtained by inverting the first quadrature select signal;

a third selection transistor having one end connected to the other ends of the fifth and sixth transistors and the other end connected to one end of the second source transistor, and turned on according to the first quadrature select signal applied to a gate thereof; and

a fourth selection transistor having one end connected to the other ends of the seventh and eighth transistors and the other end connected to the one end of the second source transistor, and turned on according to the first quadrature inversion select signal applied to a gate thereof.

7. The phase shifting device of claim 1 , wherein

the plurality of sub-vector sum circuits have a preset size ratio, and

the size ratio is determined according to a ratio of a gate width of a transistor individually included in the plurality of sub-vector sum circuits.

8. The phase shifting device of claim 4 , wherein

the first differential output signal is a signal obtained by combining a first signal transmitted through the first output terminal, a third signal transmitted through the third output terminal, and a fifth signal transmitted through the fifth output terminal, and the second differential output signal is a signal obtained by combining a second signal transmitted through the second output terminal, a fourth signal transmitted through the fourth output terminal, and a sixth signal transmitted through the sixth output terminal.

9. The phase shifting device of claim 1 , wherein

the other end of the first source transistor and the other end of the second source transistor are connected to a ground voltage.

10. The phase shifting device of claim 1 , wherein

the first differential input signal is a signal having a phase difference of 180° from the second differential input signal, and

the first phase signal is a signal having a phase difference of 180° from the second phase signal, a signal having a phase difference of 90° from the third phase signal, and a signal having a phase difference of 270° from the fourth phase signal.

11. A method for a phase shifting device, the method comprising:

outputting, by the phase shifting device, first and second differential input signals based on an input signal, the phase shifting device including a plurality of sub-vector sum circuits;

outputting, by the phase shifting device, first to fourth phase signals based on the first and second differential input signals;

receiving, by the phase shifting device, a first control signal, a second control signal, a plurality of in-phase select signals, and a plurality of quadrature select signals;

outputting, by the phase shifting device, an in-phase current according to the first control signal, and outputting, by the phase shifting device, a quadrature current according to the second control signal;

outputting, by the phase shifting device, first and second differential output signals based on the first to fourth phase signals according to the plurality of in-phase select signals and the plurality of quadrature select signals; and

outputting an output signal based on the first and second differential output signals.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE DATA PREVIOUSLY RECORDED ON REEL 045392 FRAME 0294. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 13, 2018
From: PARK, JINSEOK; HONG, SONG-CHEOLL; KANG, SEUNG HOON; CHUNG, JAEHOON; AHN, MINKI
To: LG ELECTRONICS INC.; KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Reel/Frame 045942/0257 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2018
From: PARK, JINSEOK; HONG, SONG-CHEOLL; KANG, SEUNG HOON; CHUNG, JAEHOON; AHN, MINKI
To: LG ELECTRONICS INC.
Reel/Frame 045392/0294 →
Priority Claims (1)
KR 10-2017-0004302 · Jan 11, 2017 · national
Continuity (1)
Related Publication 20180198206A1 · Jul 12, 2018
Cited By (1)
US 12,224,728