IP Library Granted Patent US 12,369,443
Granted Patent B2
US 12,369,443 · App. 18/743,135 · Granted Jul 22, 2025

Diode package structure and manufacturing method thereof

Inventors: Yu-Jing Fang (Hsinchu, TW); Hsiang-Chun Hsu (Hsinchu, TW); Cheng-Ping Chang (Hsinchu, TW)
Assignee: Lextar Electronics Corporation
H10H20/855H01L21/565H01L23/3135H10F71/00H10F77/413H10F77/50H10H20/01H10H20/853H10H20/0362H10H20/0363
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,369,443
App. No.
18/743,135
Granted
Jul 22, 2025
Kind
B2
Abstract

A diode package structure includes a substrate, at least one diode chip and an opaque encapsulating layer. The substrate has an electrically conductive layer. At least one diode chip is mounted on the substrate and electrically connected to the electrically conductive layer. The opaque encapsulating layer has a cap portion and a sidewall portion, wherein the sidewall portion is connected to and surrounds the substrate to jointly form a concave structure, the cap portion is connected between a sidewall of the diode chip and the sidewall portion, wherein a first contact vertex of the cap portion and the sidewall of the diode chip is higher than a second contact vertex of the cap portion and the sidewall portion.

Claims (13)

1. A diode package structure manufacturing method comprising:

providing a substrate;

mounting diode chips on the substrate;

forming a first opaque encapsulating layer among the diode chips;

forming a transparent encapsulating layer to cover the diode chips and the first opaque encapsulating layer;

forming a trench to expose the substrate in an area where the transparent encapsulating layer and the first opaque encapsulating layer are overlapped; and

filling a second opaque encapsulating layer in the trench, wherein a first contact vertex of the first opaque encapsulating layer and a sidewall of each diode chip is higher than a second contact vertex of the first opaque encapsulating layer and the second opaque encapsulating layer.

2. The method of claim 1 , wherein an interface is formed between the transparent encapsulating layer and the second opaque encapsulating layer, an angle between the interface and a connection line between the first contact vertex and the second contact vertex is an acute angle.

3. The method of claim 1 , wherein the first and second opaque encapsulating layers comprise white encapsulating glue.

4. The method of claim 1 , wherein the first and second opaque encapsulating layers comprise black encapsulating glue.

5. The method of claim 1 , wherein the diode chips comprise light-emitting diodes.

6. The method of claim 1 , wherein the diode chips comprise photodiodes.

7. The method of claim 1 , wherein the diode chips comprise Zener diodes.

Assignments (2)
MERGER Recorded Mar 27, 2026
From: LEXTAR ELECTRONICS CORPORATION
To: ENNOSTAR CORPORATION
Reel/Frame 075286/0822 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2024
From: FANG, YU-JING; HSU, HSIANG-CHUN; CHANG, CHENG-PING
To: LEXTAR ELECTRONICS CORPORATION
Reel/Frame 067739/0477 →
Priority Claims (1)
TW 109144520 · Dec 16, 2020 · national
Continuity (2)
Division 17447574 · Sep 13, 2021
Related Publication 20240339572A1 · Oct 10, 2024
References Cited (21)
US 8541801B2 · Kim et al. · 2013 [cited by applicant]
US 9502623B1 · Miyamoto et al. · 2016 [cited by applicant]
US 20100176417A1 · Wang · 2010 [cited by applicant]
US 20160276546A1 · Lee et al. · 2016 [cited by applicant]
US 20160293811A1 · Hussell et al. · 2016 [cited by applicant]
US 20170295340A1 · Metrani et al. · 2017 [cited by applicant]
US 20190363232A1 · Murthy et al. · 2019 [cited by applicant]
US 20190371974A1 · Hussell · 2019 [cited by applicant]
US 20200105984A1 · Damborsky et al. · 2020 [cited by applicant]
CN 102308399A · 2012 [cited by applicant]
CN 107438899A · 2017 [cited by applicant]
CN 109087982A · 2018 [cited by applicant]
JP 2003318448A · 2003 [cited by applicant]
TW I518948B · 2016 [cited by applicant]
TW I616005B · 2018 [cited by applicant]
TW 201814924A · 2018 [cited by applicant]
TW 201906197A · 2019 [cited by applicant]
TW I662723B · 2019 [cited by applicant]
TW 202018966A · 2020 [cited by applicant]
TW 202023067A · 2020 [cited by applicant]
TW 202034414A · 2020 [cited by applicant]