IP Library Granted Patent US 12,408,436
Granted Patent B2
US 12,408,436 · App. 18/760,784 · Granted Sep 2, 2025

Display device

Inventors: Jin Sung An (Seongnam-si, KR); Seok Je Seong (Seongnam-si, KR); Seong Jun Lee (Seoul, KR); Ji Seon Lee (Hwaseong-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10D86/60H10D86/441G09G3/3291G09G2300/0426H10K59/131
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Quick Facts
Patent No.
US 12,408,436
App. No.
18/760,784
Granted
Sep 2, 2025
Kind
B2
Abstract

A display device includes a first active pattern, a first conductive pattern including a gate electrode overlapping the first active pattern, a first gate line overlapping the first active pattern and extending in a first direction, and a second gate line extending in the first direction, a second conductive pattern disposed on the first conductive pattern and including a third gate line extending in the first direction and a fourth gate line extending in the first direction, a second active pattern disposed on the second conductive pattern and including a material different from a material of the first active pattern, and a third conductive pattern disposed on the second active pattern and including a first upper electrode overlapping the third gate line and connected to the third gate line, and a second upper electrode overlapping the fourth gate line and connected to the fourth gate line.

Claims (77)

1. A display device, comprising:

a first transistor including:

a first channel of a first active pattern including a silicon semiconductor; and

a first gate electrode overlapping the first channel of the first active pattern;

a second transistor including:

a second channel of the first active pattern; and

a second gate electrode overlapping the second channel of the first active pattern and extending in a first direction;

a third transistor including:

a third gate electrode extending in the first direction;

a first channel of a second active pattern including an oxide semiconductor and extending in a second direction perpendicular to the first direction; and

a first upper electrode overlapping the first channel of the second active pattern and electrically connected to the third gate electrode of the third transistor;

a fourth transistor including:

a fourth gate electrode extending in the first direction;

a second channel of the second active pattern; and

a second upper electrode overlapping the second channel of the second active pattern and electrically connected to the fourth gate electrode of the fourth gate electrode of the fourth transistor; and

a conductive pattern including:

a connection pattern electrically connecting the first gate electrode of the first transistor to the second active pattern, contacting a region between the first channel and the second channel of the second active pattern, and including a portion extending in a third direction crossing both the first direction and the second direction.

2. The display device of claim 1 , wherein an angle formed by the first direction and the third direction is greater than 0° and less than 90°.

3. The display device of claim 1 , further comprising:

a horizontal connection line extending in the first direction and applied with a first data voltage; and

a vertical connection line extending in the second direction and applied with the first data voltage.

4. The display device of claim 3 , wherein the vertical connection line overlaps the horizontal connection line and is electrically connected to the horizontal connection line.

5. The display device of claim 3 , further comprising:

a data line extending in the second direction and applied with a second data voltage.

6. The display device of claim 5 , wherein the conductive pattern further includes a data voltage pad, and

wherein the data line overlaps the data voltage pad and is electrically connected to the data voltage pad.

7. The display device of claim 1 , further comprising:

a high power voltage line overlapping at least a portion of the connection pattern and at least a portion of the second active pattern.

8. The display device of claim 7 , wherein the conductive pattern further includes a shielding pattern, and

wherein the high power voltage line overlaps the shielding pattern.

9. The display device of claim 8 , wherein the high power voltage line is electrically connected to the shielding pattern.

10. The display device of claim 7 , wherein the high power voltage line overlaps the first channel and the second channel of the second active pattern.

11. The display device of claim 7 , wherein the high power voltage line extends in the second direction.

12. The display device of claim 1 , further comprising:

a gate initialization voltage line disposed on a same layer as the third gate electrode of the third transistor.

13. The display device of claim 12 , wherein the conductive pattern further includes a gate initialization voltage connection pattern, and

wherein the gate initialization voltage connection pattern overlaps the gate initialization voltage line and is electrically connected to the gate initialization voltage line.

14. The display device of claim 13 , wherein the gate initialization voltage connection pattern overlaps the second active pattern and is electrically connected to the second active pattern.

15. A display device, comprising:

a first transistor including:

a first channel of a first active pattern including a silicon semiconductor; and

a first gate electrode overlapping the first channel of the first active pattern;

a second transistor including:

a second channel of the first active pattern; and

a second gate electrode overlapping the second channel of the first active pattern and extending in a first direction;

a third transistor including:

a third gate electrode extending in the first direction;

a first channel of a second active pattern including an oxide semiconductor and extending in a second direction perpendicular to the first direction; and

a first upper electrode overlapping the first channel of the second active pattern and electrically connected to the third gate electrode of the third transistor;

a fourth transistor including:

a fourth gate electrode extending in the first direction;

a second channel of the second active pattern; and

a second upper electrode overlapping the second channel of the second active pattern and electrically connected to the fourth gate electrode of the fourth gate electrode of the fourth transistor;

a conductive pattern including:

a connection pattern electrically connecting the first gate electrode of the first transistor to the second active pattern and including a portion extending in a third direction crossing both the first direction and the second direction;

a horizontal connection line extending in the first direction; and

a vertical connection line extending in the second direction.

16. The display device of claim 15 , wherein the connection pattern contacts a region between the first channel and the second channel of the second active pattern.

17. The display device of claim 15 , wherein an angle formed by the first direction and the third direction is greater than 0° and less than 90°.

18. The display device of claim 15 , wherein the vertical connection line overlaps the horizontal connection line and is electrically connected to the horizontal connection line.

19. The display device of claim 15 , wherein the horizontal connection line and the vertical connection line are applied with a first data voltage.

20. The display device of claim 19 , further comprising:

a data line extending in the second direction and applied with a second data voltage.

21. The display device of claim 20 , wherein the conductive pattern further includes a data voltage pad, and

wherein the data line overlaps the data voltage pad and is electrically connected to the data voltage pad.

22. The display device of claim 15 , further comprising:

a high power voltage line overlapping at least a portion of the connection pattern and at least a portion of the second active pattern.

23. The display device of claim 22 , wherein the conductive pattern further includes a shielding pattern, and

wherein the high power voltage line overlaps the shielding pattern.

24. The display device of claim 23 , wherein the high power voltage line is electrically connected to the shielding pattern.

25. The display device of claim 22 , wherein the high power voltage line overlaps the first channel and the second channel of the second active pattern.

26. The display device of claim 22 , wherein the high power voltage line extends in the second direction.

27. The display device of claim 15 , further comprising:

a gate initialization voltage line disposed on a same layer as the third gate electrode of the third transistor.

28. The display device of claim 27 , wherein the conductive pattern further includes a gate initialization voltage connection pattern, and

wherein the gate initialization voltage connection pattern overlaps the gate initialization voltage line and is electrically connected to the gate initialization voltage line.

29. The display device of claim 28 , wherein the gate initialization voltage connection pattern overlaps the second active pattern and is electrically connected to the second active pattern.

Priority Claims (1)
KR 10-2020-0028653 · Mar 6, 2020 · national
Continuity (4)
Continuation 18239470 · Aug 29, 2023
Continuation 18100170 · Jan 23, 2023
Continuation 17144273 · Jan 8, 2021
Related Publication 20240355835A1 · Oct 24, 2024
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Cited By (1)
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