POLISHING PAD AND PROCESS FOR PREPARING THE SAME

1 . A polishing pad, which comprises a top-pad that is brought into contact with a wafer to perform polishing and a sub-pad that is located on one side of the top-pad, wherein the following Relationship 1 is satisfied:

R

⁢

R

8

⁢

5

<

R

⁢

R

9

⁢

5

[

Relationship

⁢

1

]

in Relationship 1, RR 85 is the polishing rate (Å/minute) at a distance of 85 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer; and RR 95 is the polishing rate (Å/minute) at a distance of 95 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer.

2 . The polishing pad of claim 1 , wherein the average slope between distances of 85 mm and 95 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer has a positive value.

3 . The polishing pad of claim 1 , wherein the average slope between distances of 85 mm and 95 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer is 0.5 or more.

4 . The polishing pad of claim 1 , wherein the average slope between distances of 85 mm and 95 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer is 0.5 to 15.

5 . The polishing pad of claim 1 , wherein the polishing rate difference (ARR) according to the following Relationship 2 is 200 Å/minute or less:

Δ

⁢

RR

=

R

⁢

R

9

⁢

5

-

R

⁢

R

8

⁢

5

[

Relationship

⁢

2

]

in Relationship 2, RR 85 is the polishing rate (Å/minute) at a distance of 85 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer; and RR 95 is the polishing rate (Å/minute) at a distance of 95 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer.

6 . The polishing pad of claim 1 , wherein, when the silicon oxide layer of a silicon wafer is polished with a ceria slurry using the polishing pad, the average polishing rate according to the following Mathematical Equation 1 is 2,100 Å/minute to 3,500 Å/minute:

Average

⁢

polishing

⁢

rate

⁢

(

A

∘

/

minute

)

=

difference

⁢

in

⁢

thickness

⁢

before

⁢

and

⁢

after

⁢

polishing

⁢

(

A

∘

)

/

polishing

⁢

time

⁢

(

minute

)

[

Mathematical

⁢

Equation

⁢

l

]

7 . The polishing pad of claim 1 , wherein the polishing pad has a within-wafer non-uniformity (WIWNU) of 10% or less for oxides.

8 . The polishing pad of claim 1 , wherein the sub-pad comprises a nonwoven fabric layer and a suede layer.

9 . The polishing pad of claim 8 , wherein the suede layer is located on one side of the top-pad.

10 . The polishing pad of claim 8 , wherein the nonwoven fabric layer is a nonwoven fabric layer impregnated with a resin.

11 . The polishing pad of claim 10 , wherein the nonwoven fabric layer is a fibrous nonwoven fabric layer comprising at least one fiber selected from the group consisting of a polyester fiber, a polyamide fiber, a polypropylene fiber, and a polyethylene fiber.

12 . The polishing pad of claim 10 , wherein the resin impregnated in the nonwoven fabric layer comprises at least one resin selected from the group consisting of a polyurethane resin, a polybutadiene resin, a styrene-butadiene copolymer resin, a styrene-butadiene-styrene copolymer resin, an acrylonitrile-butadiene copolymer resin, a styrene-ethylene-butadiene-styrene copolymer resin, a silicone rubber resin, a polyester-based elastomer resin, and a polyamide-based elastomer resin.

13 . The polishing pad of claim 8 , wherein the ratio of thicknesses of the nonwoven fabric layer and the suede layer is 1:0.5 to 2.

14 . The polishing pad of claim 1 , wherein the sub-pad has:

a thickness of 0.5 mm to 2.5 mm,

a hardness of 60 Shore D to 90 Shore D,

a compressibility of 5% to 15%,

a density of 0.25 g/cm3 to 0.7 g/cm 3 , and

a compressive elasticity of 70% to 90%.

15 . The polishing pad of claim 1 , wherein the top-pad has:

a hardness of 50 Shore D to 65 Shore D,

a specific gravity of 0.6 g/cm 3 to 0.9 g/cm 3 ,

a tensile strength of 15 N/mm 2 to 25 N/mm 2 , and

an elongation of 90% to 130%.

16 . The polishing pad of claim 1 , wherein the top-pad comprises a polishing layer comprising a polyurethane-based resin, and the polishing layer comprises a urethane-based prepolymer, a foaming agent, and a curing agent.

17 . The polishing pad of claim 16 , wherein the polishing layer has:

a thickness of 0.8 mm to 5 mm,

a specific gravity of 0.6 g/cm 3 to 0.9 g/cm 3 ,

a hardness of 30 Shore D to 80 Shore D,

a tensile strength of 5 N/mm 2 to 30 N/mm 2 , and

an elongation of 50% to 300%.

18 . A process for preparing a polishing pad, which comprises:

(1) preparing a top-pad using a top-pad composition comprising a urethane-based prepolymer, a foaming agent, and a curing agent;

(2) preparing a sub-pad comprising a nonwoven fabric layer and a suede layer; and

(3) combining the top-pad and the sub-pad to prepare a polishing pad,

wherein the polishing pad satisfies the following Relationship 1:

R

⁢

R

8

⁢

5

<

R

⁢

R

9

⁢

5

[

Relationship

⁢

1

]

in Relationship 1, RR 85 is the polishing rate (Å/minute) at a distance of 85 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer; and RR 95 is the polishing rate (Å/minute) at a distance of 95 mm from the center of the wafer in the polishing rate profile in a CMP process for a silicon oxide layer.

19 . The process for preparing a polishing pad of claim 18 , wherein step (2) comprises impregnating a nonwoven fabric with a resin to prepare a nonwoven fabric layer; and casting a resin on one side of the nonwoven fabric layer to form a suede layer.

20 . A process for preparing a semiconductor device, which comprises polishing the surface of a semiconductor substrate using the polishing pad of claim 1 .