THREE-DIMENSIONAL MEMORY DEVICE CONTAINING SILICON OXYCARBIDE LINERS AND METHODS OF FORMING THE SAME
A memory device includes an alternating stack comprising silicon oxycarbide layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and containing a vertical semiconductor channel and a memory film including a ferroelectric material layer in direct contact with sidewalls the electrically conductive layers.
1 . A memory device, comprising:
an alternating stack comprising silicon oxycarbide layers and electrically conductive layers;
a memory opening vertically extending through the alternating stack; and
a memory opening fill structure located in the memory opening and comprising a vertical semiconductor channel and a memory film comprising a ferroelectric material layer in direct contact with sidewalls the electrically conductive layers.
2 . The memory device of claim 1 , wherein the memory film consists essentially of the ferroelectric material layer.
3 . The memory device of claim 1 , wherein a cylindrical surface segment of the ferroelectric material layer is in contact with cylindrical surfaces of the electrically conductive layers.
4 . The memory device of claim 1 , wherein an outer sidewall of the vertical semiconductor channel is in contact with an inner cylindrical sidewall of the ferroelectric material layer.
5 . The memory device of claim 1 , wherein:
the alternating stack further comprises insulating layers having a different composition than the silicon oxycarbide layers;
the silicon oxycarbide layers comprise silicon oxycarbide liners located between the insulating layers and the electrically conductive layers; and
a first electrically conductive layer of the electrically conductive layers is in contact with an underlying silicon oxycarbide liner and with an overlying silicon oxycarbide liner.
6 . The memory device of claim 5 , wherein each of the underlying silicon oxycarbide liner and the overlying silicon oxycarbide liner comprises a respective cylindrical surface segment in direct contact with the ferroelectric material layer.
7 . The memory device of claim 5 , wherein:
the overlying silicon oxycarbide liner is in contact with a bottom surface of an overlying insulating layer of the insulating layers;
the underlying silicon oxycarbide liner is in contact with a top surface of an underlying insulating layer of the insulating layers; and
the insulating layers do not embed a seam or an airgap therein.
8 . The memory device of claim 1 , wherein:
the alternating stack consists essentially of the silicon oxycarbide layers and the electrically conductive layers; and
a first electrically conductive layer of the electrically conductive layers is in contact with an underlying silicon oxycarbide layer and with an overlying silicon oxycarbide layer.
9 . The memory device of claim 1 , wherein the ferroelectric material layer comprises doped or undoped hafnium oxide in a non-centrosymmetric orthorhombic phase.
10 . The memory device of claim 1 , wherein each of the electrically conductive layers has a respective uniform vertical thickness throughout.
11 . A method of forming a memory device, comprising:
forming an alternating stack of silicon oxycarbide layers and a sacrificial material layers;
forming a memory opening through the alternating stack;
forming a memory opening fill structure in the memory opening, wherein the memory opening fill structure comprises a vertical semiconductor channel and a memory film comprising a ferroelectric material layer;
forming backside recesses by removing the sacrificial material layers selectively to the first and the second silicon oxycarbide layers; and
forming electrically conductive layers in the backside recesses.
12 . The method of claim 11 , wherein:
the vertical semiconductor channel is formed directly on an inner sidewall of the ferroelectric material layer; and
the electrically conductive layers are formed directly on the outer cylindrical surface segments of the ferroelectric material layer.
13 . The method of claim 11 , wherein the sacrificial material layers comprise silicon nitride.
14 . The method of claim 13 , further comprising forming a vertical stack of tubular silicon oxide portions by oxidizing surfaces portions of the silicon nitride sacrificial material layers exposed in the memory opening into the silicon oxide portions.
15 . The method of claim 14 , wherein:
the sacrificial material layers are removed selectively to the first and the second silicon oxycarbide layers and to the tubular silicon oxide portions during formation of the backside recesses; and
the tubular silicon oxide portions are removed selectively to the memory film through the backside recesses after the step of forming the backside recesses and before the step of forming the electrically conductive layers in the backside recesses.
16 . The method of claim 15 , wherein the memory film is formed directly on inner cylindrical sidewalls of the tubular silicon oxide portions.
17 . The method of claim 11 , wherein the alternating stack further comprises insulating layers having a different composition than the silicon oxycarbide layers.
18 . The method of claim 17 , wherein:
the alternating stack includes a vertical repetition of multiple instances of a repetition unit; and
the repetition unit comprises, from bottom to top, an insulating layer, a first silicon oxycarbide layer, a sacrificial material layer, and a second silicon oxycarbide layer.
19 . The method of claim 11 , wherein the alternating stack consists essentially of the sacrificial material layers and the silicon oxycarbide layers.
20 . The method of claim 11 , further comprising removing a bottom portion of the ferroelectric material layer and forming a source layer directly on a bottom surface of a remaining portion of the ferroelectric material layer and on a bottom surface of the vertical semiconductor channel.