IP Library › Granted Patent US 12,732,117
Granted Patent B2
US 12,732,117 · App. 18/991,801 · Granted Sep 8, 2026

X-type multilevel converter systems including interleaved topologies for mutual inductance cancellation

Inventors: Benjamin S. Ngu (Rochester Hills, MI); Yilun Luo (Ann Arbor, MI); Khorshed Mohammed Alam (Canton, MI); Chandra S. Namuduri (Troy, MI); Rashmi Prasad (Troy, MI); Michael Z. Pieszala (Panama City, FL)
Assignee: GM Global Technology Operations LLC
H02M7/003H02M7/537H05K7/14329H05K7/209B60L50/51B60L2210/40
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Quick Facts
Patent No.
US 12,732,117
App. No.
18/991,801
Granted
Sep 8, 2026
Kind
B2
Abstract

A multi-phase power inverter including a plurality of X-type multilevel power converters arranged to transfer electric power between a high-voltage direct current (DC) power supply and an electric machine. Each of the plurality of X-type multilevel power converters is configured as a solid-state integrated circuit (IC) including folded legs including a plurality of semiconductor switches, and clamping diodes. The plurality of semiconductor switches, a positive DC power bus, a negative DC power bus, a first AC bus, a second AC bus, a third AC bus, a fourth AC bus, and the clamping diodes are arranged into a plurality of tiers. Such that both the positive DC power bus and the negative DC power bus are parallel with the neutral bus generating mutual inductance cancellation that minimizes parasitic inductance by coupling positive mutual inductance and negative mutual inductance for commutation loop currents within each of the X-type multilevel converters.

Claims (128)

1 . A multi-phase power inverter for an electric propulsion system, the multi-phase power inverter comprising:

a plurality of X-type multilevel power converters arranged to transfer electric power between a high-voltage direct current (DC) power supply and an electric machine, wherein each of the plurality of X-type multilevel power converters is a solid-state integrated circuit (IC) including:

a first leg; and

a second leg, each of the first leg and the second leg including:

a positive DC power bus;

a negative DC power bus;

a neutral bus;

a first alternating current (AC) bus;

a second AC bus;

a first conductive layer;

a second conductive layer; and

wherein the first leg further includes:

a first plurality of semiconductor switches including a third semiconductor switch, a fourth semiconductor switch, a fifth semiconductor switch, and a sixth semiconductor switch;

a first clamping diode; and

a first plurality of conductive spacers arranged between the fifth semiconductor switch and the positive DC power bus, the sixth semiconductor switch and the first AC bus, the fourth semiconductor switch and the second conductive layer, the third semiconductor switch and the second conductive layer, and the first clamping diode and the second conductive layer; and

wherein the second leg further includes:

a second plurality of semiconductor switches including a first semiconductor switch, a second semiconductor switch, a seventh semiconductor switch, and an eighth semiconductor switch;

a second clamping diode;

a second plurality of conductive spacers arranged between the first semiconductor switch and the positive DC power bus; the second semiconductor switch and the second AC bus; the eighth semiconductor switch and the second conductive layer; the seventh semiconductor switch and the second conductive layer; and the second clamping diode and the second conductive layer; and

wherein the first plurality of semiconductor switches, the first leg positive DC power bus, the first leg negative DC power bus, the first leg first AC bus, the first leg second AC bus, the first leg first conductive layer, the first leg second conductive layer, and the first clamping diode are arranged into a plurality of tiers including:

a first tier composed of the first leg first conductive layer arranged coplanar with the first leg first negative DC power bus that is arranged coplanar with the first leg second AC bus;

a second tier composed of the first clamping diode arranged coplanar with the third semiconductor switch arranged coplanar with the fourth semiconductor switch that is arranged coplanar with the fifth semiconductor switch that is arranged coplanar with the sixth semiconductor switch; and

a third tier composed of first leg second conductive layer arranged coplanar with the first leg first positive DC power bus arranged coplanar the first leg first AC bus; and

wherein the second plurality of semiconductor switches, the second leg positive DC power bus, the second leg negative DC power bus, the second leg first AC bus, the second leg second AC bus, the second leg first conductive layer, the second leg second conductive layer, and the second clamping diode are arranged into a plurality of tiers including:

a first tier composed of the second leg first conductive layer arranged coplanar with the second leg first negative DC power bus that is arranged coplanar with the second leg second AC bus;

a second tier composed of the second clamping diode arranged coplanar with the first semiconductor switch arranged coplanar with the second semiconductor switch that is arranged coplanar with the seventh semiconductor switch that is arranged coplanar with the eighth semiconductor switch; and

a third tier composed of second leg second conductive layer arranged coplanar with the second leg first positive DC power bus arranged coplanar the second leg first AC bus; and

wherein the first leg and the second leg are electrically connected by interconnections arranged between the first AC bus of the first leg and the first AC bus of the second leg, and the second AC bus of the first leg and the second AC bus of the second leg.

2 . The multi-phase power inverter as recited in claim 1 , further including:

a first heat sink; and

a second heat sink;

a first power module substrate; and

a second power module substrate; and

wherein the first leg first conductive layer, the first leg negative DC power bus, and the first leg second AC bus are arranged adjacent to a first side of the first power module substrate;

wherein the first heat sink is arranged adjacent to a second side of the first power module substrate;

wherein the second leg first conductive layer, the second leg negative DC power bus, and the second leg second AC bus are arranged adjacent to a first side of the second power module substrate; and

wherein the second heat sink is arranged adjacent to a second side of the second power module substrate.

3 . The multi-phase power inverter as recited in claim 2 , wherein the fifth semiconductor switch and the sixth semiconductor switch are arranged on a first portion of the first power module substrate;

wherein the first clamping diode, and a first plurality of gate/source pins are arranged on a second portion of the first power module substrate;

wherein the fourth semiconductor switch and the third semiconductor switch are arranged on a third portion of the first power module substrate;

wherein the first portion, the second portion, and the third portion of the first power module substrate are coplanar, the second portion being arranged between the first portion and the third portion;

wherein the first semiconductor switch and the second semiconductor switch are arranged on a first portion of the second power module substrate;

wherein the second clamping diode, and a second plurality of gate/source pins are arranged on a second portion of the second power module substrate;

wherein the eighth semiconductor switch and the seventh semiconductor switch are arranged on a third portion of the second power module substrate; and

wherein the first portion, the second portion, and the third portion of the second power module substrate are coplanar, the second portion being arranged between the first portion and the third portion.

4 . The multi-phase power inverter as recited in claim 3 , wherein the first plurality of gate/source pins and the second plurality of gate/source pins are configured to pop out vertically from the first power module substrate and the second power module substrate respectively.

5 . The multi-phase power inverter as recited in claim 4 , wherein the first leg positive DC power bus, the first leg negative DC power bus, the second leg positive DC power bus, and the second leg negative DC power bus are arranged at a first end of the X-type multilevel power converter, and wherein the first leg first AC bus, the first leg second AC bus, the second leg first AC bus, and the second leg second AC bus are arranged at a second end of the X-type multilevel power converter.

6 . The multi-phase power inverter as recited in claim 1 , wherein each of the first plurality of semiconductor switches and the second plurality of semiconductor switches includes a single die.

7 . The multi-phase power inverter as recited in claim 6 , wherein each single die includes a vertical device.

8 . The multi-phase power inverter as recited in claim 1 , wherein each of the first plurality of semiconductor switches and the second plurality of semiconductor switches includes a plurality of dies.

9 . The multi-phase power inverter as recited in claim 8 , wherein each of the plurality of dies includes a vertical device.

10 . A multi-phase power inverter for an electric propulsion system, the multi-phase power inverter comprising:

a plurality of X-type multilevel power converters arranged to transfer electric power between a high-voltage direct current (DC) power supply and an electric machine, wherein each of the plurality of X-type multilevel power converters is a solid-state integrated circuit (IC) including:

a first leg; and

a second leg, each of the first leg and the second leg including:

a positive DC power bus;

a negative DC power bus;

a neutral bus;

a first alternating current (AC) bus;

a second AC bus;

a first conductive layer;

a second conductive layer; and

wherein the first leg further includes:

a first plurality of semiconductor switches including a third semiconductor switch, a fourth semiconductor switch, a fifth semiconductor switch, and a sixth semiconductor switch;

a first clamping diode; and

a first plurality of conductive spacers arranged between the first clamping diode and a first portion of the first conductive layer; and

wherein the second leg further includes:

a second plurality of semiconductor switches including a first semiconductor switch, a second semiconductor switch, a seventh semiconductor switch, and an eighth semiconductor switch;

a second clamping diode; and

a second plurality of conductive spacers arranged between the second clamping diode and the first conductive layer; and

wherein the first plurality of semiconductor switches, the first leg positive DC power bus, the first leg negative DC power bus, the first leg first AC bus, the first leg second AC bus, the first leg first conductive layer, the first leg second conductive layer, and the first clamping diode are arranged into a plurality of tiers including:

a first tier composed of the first leg first AC bus arranged coplanar with the first leg second AC bus arranged coplanar with the first portion of the first leg first conductive layer that is arranged coplanar with the first leg positive DC power bus that is arranged coplanar with the first leg negative DC power bus;

a second tier composed of the first clamping diode arranged coplanar with the third semiconductor switch arranged coplanar with the fourth semiconductor switch that is arranged coplanar with the fifth semiconductor switch that is arranged coplanar with the sixth semiconductor switch; and

a third tier composed of a second portion of the first leg first conductive layer; and

wherein the second plurality of semiconductor switches, the second leg positive DC power bus, the second leg negative DC power bus, the second leg first AC bus, the second leg second AC bus, the second leg first conductive layer, the second leg second conductive layer, and the second clamping diode are arranged into a plurality of tiers including:

a first tier composed of the second leg first AC bus arranged coplanar with the second leg second AC bus arranged coplanar with the first portion of the second leg first conductive layer that is arranged coplanar with the second leg first positive DC power bus that is arranged coplanar with the second leg negative DC power bus;

a second tier composed of the second clamping diode arranged coplanar with the first semiconductor switch arranged coplanar with the second semiconductor switch that is arranged coplanar with the seventh semiconductor switch that is arranged coplanar with the eighth semiconductor switch; and

a third tier composed of a second portion of the second leg first conductive layer; and

wherein the first leg and the second leg are electrically connected by interconnections arranged between the first leg first AC bus and the second leg first AC bus, and the second leg second AC bus and the second leg second AC bus.

11 . The multi-phase power inverter as recited in claim 10 , further including:

a first heat sink; and

a second heat sink;

a first power module substrate; and

a second power module substrate; and

wherein the first leg first conductive layer, the first leg negative DC power bus, and the first leg second AC bus are arranged adjacent to a first side of the first power module substrate;

wherein the first heat sink is arranged adjacent to a second side of the first power module substrate;

wherein the second leg first conductive layer, the second leg negative DC power bus, and the second leg second AC bus are arranged adjacent to a first side of the second power module substrate; and

wherein the second heat sink is arranged adjacent to a second side of the second power module substrate.

12 . The multi-phase power inverter as recited in claim 11 , wherein the fifth semiconductor switch, the sixth semiconductor switch, and a first portion of a first plurality of gate/source pins are arranged on a first portion of the first power module substrate;

wherein the first clamping diode, and a second portion of the first plurality of gate/source pins are arranged on a second portion of the first power module substrate;

wherein the third semiconductor switch, the fourth semiconductor switch, and a third portion of the first plurality of gate/source pins are arranged on a third portion of the first power module substrate;

wherein the first portion, the second portion, and the third portion of the first power module substrate are coplanar, the second portion being arranged between the first portion and the third portion;

wherein the first semiconductor switch, the second semiconductor switch, and a first portion of a second plurality of gate/source pins are arranged on a first portion of the second power module substrate;

wherein the second clamping diode, and a second portion of the second plurality of gate/source pins are arranged on a second portion of the second power module substrate;

wherein the seventh semiconductor switch, the eighth semiconductor switch, and a third portion of the second plurality of gate/source pins are arranged on a third portion of the second power module substrate; and

wherein the first portion, the second portion, and the third portion of the second power module substrate are coplanar, the second portion being arranged between the first portion and the third portion.

13 . The multi-phase power inverter as recited in claim 12 , wherein the first plurality of gate/source pins and the second plurality of gate/source pins are configured to pop out vertically from the first power module substrate and the second power module substrate respectively.

14 . The multi-phase power inverter as recited in claim 13 , wherein the first leg positive DC power bus, the first leg negative DC power bus, the second leg positive DC power bus, and the second leg negative DC power bus are arranged at a first end of the X-type multilevel power converter, and wherein the first leg first AC bus, the first leg second AC bus, the second leg first AC bus, and the second leg second AC bus are arranged at a second end of the X-type multilevel power converter.

15 . The multi-phase power inverter as recited in claim 10 , wherein each of the first plurality of semiconductor switches and the second plurality of semiconductor switches includes a single die.

16 . The multi-phase power inverter as recited in claim 15 , wherein each single die includes a lateral device.

17 . The multi-phase power inverter as recited in claim 10 , wherein each of the first plurality of semiconductor switches and the second plurality of semiconductor switches includes a plurality of dies.

18 . The multi-phase power inverter as recited in claim 17 , wherein each of the plurality of dies includes a lateral device.

19 . A vehicle including an electric propulsion system, the vehicle comprising:

an electric propulsion system installed in a vehicle, the electric propulsion system including:

an electric motor configured to provide power to the electric propulsion system; and

a multi-phase power inverter for an electric propulsion system, the multi-phase power inverter comprising:

a plurality of X-type multilevel power converters arranged to transfer electric power between a high-voltage direct current (DC) power supply and an electric machine, wherein each of the plurality of X-type multilevel power converters is a solid-state integrated circuit (IC) including:

a first leg; and

a second leg, each of the first leg and the second leg including:

a positive DC power bus;

a negative DC power bus;

a neutral bus;

a first alternating current (AC) bus;

a second AC bus;

a first conductive layer;

a second conductive layer; and

wherein the first leg further includes:

 a first plurality of semiconductor switches including a third semiconductor switch, a fourth semiconductor switch, a fifth semiconductor switch, and a sixth semiconductor switch;

 a first clamping diode; and

 a first plurality of conductive spacers arranged between the fifth semiconductor switch and the positive DC power bus, the sixth semiconductor switch and the first AC bus, the fourth semiconductor switch and the second conductive layer, and the third semiconductor switch and the second conductive layer; and

wherein the second leg further includes:

 a second plurality of semiconductor switches including a first semiconductor switch, a second semiconductor switch, a seventh semiconductor switch, and an eighth semiconductor switch;

 a second clamping diode;

 a second plurality of conductive spacers arranged between the first semiconductor switch and the positive DC power bus; the second semiconductor switch and the second AC bus; the eighth semiconductor switch and the second conductive layer; the seventh semiconductor switch and the second conductive layer; and the first clamping diode and the second conductive layer; and

wherein the first plurality of semiconductor switches, the first leg positive DC power bus, the first leg negative DC power bus, the first leg first AC bus, the first leg second AC bus, the first leg first conductive layer, the first leg second conductive layer, and the first clamping diode are arranged into a first plurality of tiers;

wherein the second plurality of semiconductor switches, the second leg positive DC power bus, the second leg negative DC power bus, the second leg first AC bus, the second leg second AC bus, the second leg first conductive layer, the second leg second conductive layer, and the second clamping diode are arranged into a second plurality of tiers; and

wherein the first leg and the second leg are electrically connected by interconnections arranged between the first AC bus of the first leg and the first AC bus of the second leg, and the second AC bus of the first leg and the second AC bus of the second leg.

20 . The multi-phase power inverter for an electric propulsion system as recited in claim 19 , wherein each of the first plurality of semiconductor switches includes a plurality of dies.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2024
From: NGU, BENJAMIN S.; LUO, YILUN; ALAM, KHORSHED MOHAMMED; NAMUDURI, CHANDRA S.; PRASAD, RASHMI; PIESZALA, MICHAEL Z.
To: GM GLOBAL TECHNOLOGY OPERATIONS LLC
Reel/Frame 069661/0606 →
Continuity (1)
Related Publication 20260180462A1 · Jun 25, 2026
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