Transceiver circuit
A transceiver circuit comprising: a transceiver clock input terminal to receive a transceiver clock signal defining a network frequency; a clock provision circuit to provide a coefficient clock signal, defining a coefficient frequency, and a coefficient adaption unit for providing a coefficient signal that represents one or more coefficient values. The coefficient adaption unit updates the one or more coefficient values at the coefficient frequency. The transceiver circuit also includes an adaptive filtering circuit that receives the coefficient signals at the network frequency, a filter input terminal to sequentially receive a stream of interference-symbols, and a filter output terminal to provide an interference-error signal to be removed from a network signal. The adaptive filtering circuit applies scaling factors to the coefficient signal to create scaled coefficient signals and uses the received interference-symbol to select one of the scaled coefficient signals to provide the interference-error signal.
1 . A transceiver circuit for transmitting and receiving signals within a network, wherein the transceiver circuit comprises:
a transceiver clock input terminal configured to receive a transceiver clock signal that defines a network frequency;
a clock provision circuit configured to provide, as a coefficient clock signal defining a coefficient frequency, a selected one of: i) a first clock signal defining a first frequency or ii) a second clock signal defining a second frequency that is lower than the first frequency, based on a received rate-selection-signal;
a coefficient adaption unit for providing a coefficient signal that represents one or more coefficient values, wherein
the coefficient adaption unit is configured to update the one or more coefficient values at the coefficient frequency; and
an adaptive filtering circuit, comprising:
at least one coefficient input terminal connected to the coefficient adaption unit for receiving the coefficient signals,
a filter input terminal for sequentially receiving a stream of interference-symbols at the network frequency, and
a filter output terminal for providing an interference-error signal, wherein the interference-error signal is to be removed from a network signal,
wherein the adaptive filtering circuit is configured to:
apply a plurality of scaling factors to the coefficient signal to create a plurality of scaled coefficient signals, and
selecting, based on the received interference-symbols, one of the scaled coefficient signals to use to provide the interference-error signal.
2 . The transceiver circuit of claim 1 wherein the signals within the network are pulse amplitude modulation, PAM, signals.
3 . The transceiver circuit of claim 2 wherein the PAM signals can take a value according to any of two-level modulation, three-level modulation or four-level modulation.
4 . The transceiver circuit of claim 2 , further comprising:
a slicer configured to compare a processed-network-signal to a plurality of slicer thresholds and provide a received symbol such that the received symbol has one of a plurality of target values associated with a PAM modulation level of the network signals.
5 . The transceiver circuit of claim 4 wherein the clock provision circuit further comprises an enable signal circuit configured to provide an enable signal that can have an enabled value or a disabled value, and wherein the clock provision circuit is configured to:
provide the coefficient clock signal when the enable signal has the enabled value; and
not provide the coefficient clock signal when the enable signal has the disabled value.
6 . The transceiver circuit of claim 5 wherein the enable signal circuit is configured to provide the enable signal based on the magnitude of the difference between the received signal and the processed-network-signal.
7 . The transceiver circuit of claim 5 wherein the enable signal circuit is configured to provide the enable signal based on a timing signal from a timer with configurable on/off times.
8 . The transceiver circuit of claim 5 wherein the enable signal circuit is configured to provide the enable signal based on a selected one of a magnitude of the difference between the received signal and the processed-network-signal or a timing signal from a timer with configurable on/off times based on an operational-control-signal.
9 . The transceiver circuit of claim 5 wherein the enable signal circuit is configured to provide the enable signal based on a detected error signal representative of the level of detected errors within the network.
10 . The transceiver circuit of claim 5 wherein the enable signal circuit is configured to provide the enable signal based on the rate-selection signal.
11 . The transceiver circuit of claim 5 wherein the enable signal circuit is configured to provide the enable signal by any of:
a detected error signal representative of the level of detected errors within the network,
the rate-selection signal, or
a selected one of a magnitude of the difference between the received signal and the processed-network-signal or a timing signal from a timer with configurable on/off times based on an operational-control-signal.
12 . The transceiver circuit of claim 4 , further comprising a slicer error signal block configured to provide a slicer error signal, wherein the slicer error signal is the difference between the processed-network-signal and the received symbol, and wherein the coefficient adaption unit comprises:
at least one slicer error input terminal for receiving the slicer error signal,
at least one interference symbol input terminal for receiving the stream of interference symbols,
a delay block for applying a delay to the stream of interference-symbols to provide a stream of previous interference symbols, such that the previous interference symbols are aligned with the slicer error signal that they represent, or are derived from, and
a coefficient-output terminal for providing the coefficient signal;
wherein the coefficient adaption unit is configured iteratively update the coefficient signal based on the slicer error signal and the aligned stream of previous interference symbols at the coefficient frequency.
13 . The transceiver circuit of claim 1 , wherein the clock provision circuit is configured to:
scale the transceiver clock signal by applying a first scaling factor to the transceiver clock signal to provide the first clock signal as the coefficient signal; or
scale the transceiver clock signal by applying a second scaling factor to the transceiver clock signal to provide the second clock signal as the coefficient signal, wherein the first frequency is equal to or less than the network frequency.
14 . The transceiver circuit of claim 1 wherein the network is ethernet.
15 . A method for transmitting and receiving signals within a network, wherein the method comprises:
receiving a transceiver clock signal that defines a network frequency;
providing a selected one of: i) a first clock signal or ii) a second clock signal as a coefficient clock signal, based on a received rate-selection-signal, wherein
the first clock signal defines a first frequency, and
the second clock signal defines a second frequency that is lower than the first frequency;
providing a coefficient signal that represents one or more coefficient values, wherein providing the coefficient signal comprises:
updating the one or more coefficient values at the coefficient frequency; and
providing an interference-error signal to be removed from a network signal, wherein providing the interference-error signal comprises:
receiving a stream of interference-symbols at the network frequency;
applying a plurality of scaling factors to the coefficient signal to create a plurality of scaled coefficient signals, and
using the received interference-symbols to select one of the scaled coefficient signals to use to provide the interference-error signal.