Semiconductor circuit structure with direct die heat removal structure
Semiconductor circuit structures with direct die heat removal structure are provided. The semiconductor circuit structure comprises a semiconductor substrate with an original semiconductor surface; a set of active regions within the semiconductor substrate; and a first shallow trench isolation (STI) region neighboring to the set of active regions and extending along a first direction. Wherein the first STI region includes a heat removing layer, and the material of the heat removing layer is different from SiO 2 .
1 . A semiconductor circuit structure comprising:
a semiconductor substrate with an original semiconductor surface;
an active region within the semiconductor substrate; and
a first shallow trench isolation (STI) region neighboring to the active region;
wherein the first STI region includes a heat removing layer, and the heat removing layer comprises a semiconductor material different from SiO 2 ;
wherein a thermal conductivity of the semiconductor material is a higher than that of SiO 2 .
2 . The semiconductor circuit structure of claim 1 , wherein the semiconductor material comprises BN, AlN, SiC, SiGe, Si, or the combination thereof.
3 . The semiconductor circuit structure of claim 2 , wherein the semiconductor material is undoped Si.
4 . The semiconductor circuit structure of claim 1 , wherein the first STI region further includes an insulating layer covering a bottom surface of the heat removing layer and/or a sidewall of the heat removing layer.
5 . The semiconductor circuit structure of claim 4 , wherein the insulating layer is a SiO 2 layer.
6 . The semiconductor circuit structure of claim 1 , wherein the heat removing layer extends into the active region.
7 . The semiconductor circuit structure of claim 1 , wherein a top surface of the heat removing layer is under the original semiconductor surface of the semiconductor substrate, or close to the original semiconductor surface of the semiconductor substrate.
8 . The semiconductor circuit structure of claim 1 , wherein a first transistor is located within the active region, the first transistor includes a gate structure, a drain region next to one side of the gate structure, and a source region next to another side of the gate structure; wherein the heat removing layer is close to the drain region or the source region of the first transistor.
9 . The semiconductor circuit structure of claim 8 , wherein the heat removing layer surrounds a peripheral border of the active region.
10 . The semiconductor circuit structure of claim 1 , further comprising a spare STI region remote from the active region and connected to the first STI region; wherein the heat removing layer extends along a first direction to the spare STI region, and a heat removing pad is within the spare STI region and connected to the heat removing layer.
11 . The semiconductor circuit structure of claim 10 , further comprising a thermal via above or under heat removing pad, wherein the thermal via is connected to the heat removing pad.
12 . A semiconductor circuit structure comprising:
a semiconductor substrate with an original semiconductor surface;
a set of transistors formed within the semiconductor substrate; and
a composite STI region surrounding the set of transistors;
wherein the composite STI region includes a heat removing layer and an first insulating layer, and the heat removing layer is a semiconductor material;
wherein a thermal conductivity of the semiconductor material is a higher than that of SiO 2 .
13 . The semiconductor circuit structure of claim 12 , wherein the semiconductor material comprises Si.
14 . The semiconductor circuit structure of claim 12 , wherein the first insulating layer covers at least a sidewall and a bottom surface of the heat removing layer.
15 . The semiconductor circuit structure of claim 14 , wherein the composite STI region further comprises a top insulating layer covering a top surface of the heat removing layer.
16 . The semiconductor circuit structure of claim 12 , further comprising a spare STI region remote from the set of transistors and connected to the composite STI region; wherein the heat removing layer extends to the spare STI region, and a heat removing pad is within the spare STI region and is connected to the heat removing layer.
17 . The semiconductor circuit structure of claim 16 , further comprising a thermal via above or under heat removing pad, wherein the thermal via is connected to the heat removing pad.
18 . The semiconductor circuit structure of claim 17 , further comprising a heat dissipation plate above or under the semiconductor substrate, wherein the heat dissipation plate is connected to the thermal via.