Silicon-on-insulator heat sink
An approach for sinking heat from a transistor is provided. A method includes forming a substrate contact extending from a first portion of a silicon-on-insulator (SOI) island to a substrate. The method also includes forming a transistor in a second portion of the SOI island. The method further includes electrically isolating the substrate contact from the transistor by doping the first portion of the SOI island.
1. A semiconductor structure, comprising:
a substrate;
a buried insulator layer on the substrate;
an island of a semiconductor layer on the buried insulator layer;
a substrate contact extending from a first area of the island to the substrate through the buried insulator layer; and
a transistor in a second area of the island,
wherein the substrate contact has a thermal conductivity that is greater than a thermal conductivity of the buried insulator layer;
the substrate, the island, and the substrate contact are all composed of silicon and form a continuous silicon path extending from a channel of the transistor to the substrate;
the substrate contact is electrically isolated from the transistor;
a doped portion of the island electrically isolates the substrate contact from the transistor;
the doped portion and an upper portion of the substrate contact are doped with a first type of impurity;
a source region and a drain region of the transistor are doped with a second type of impurity that is different than the first type of impurity; and
a lower portion of the substrate contact is undoped.
2. The structure of claim 1 , wherein the first area of the island directly contacts the second area of the island.
3. A semiconductor structure, comprising:
a substrate;
a buried insulator layer on the substrate;
an island of a semiconductor layer on the buried insulator layer;
a substrate contact extending from a first area of the island to the substrate through the buried insulator layer; and
a transistor in a second area of the island,
wherein the substrate contact comprises a material having a thermal conductivity that is greater than a thermal conductivity of the buried insulator layer; and
the substrate contact is electrically isolated from the transistor,
further comprising a doped region in the island that electrically isolates the substrate contact from the transistor.
4. The structure of claim 3 , wherein the doped region surrounds the substrate contact.
5. The structure of claim 3 , wherein the doped region is between the substrate contact and a source region and a drain region of the transistor.
6. The structure of claim 5 , wherein the doped region comprises a body contact of a gate of the transistor.
7. The structure of claim 3 , wherein:
the doped region comprises a first type of impurity; and
a source region and a drain region of the transistor comprise a second type of impurity that is different than the first type of impurity.
8. The structure of claim 5 , wherein the doped region directly contacts the source region of the transistor.
9. The structure of claim 3 , wherein an upper portion of the substrate contact is doped with a same dopant as the doped region.
10. The structure of claim 9 , wherein a lower portion of the substrate contact is undoped.
11. The structure of claim 3 , further comprising a nitride blocking element on an upper surface of the substrate contact and an upper surface of the doped region.
12. The structure of claim 11 , wherein the nitride blocking element covers an entirety of an interface between the doped region and a source/drain region of the transistor.
13. The structure of claim 3 , wherein the doped region is a doped portion of the island, and an uppermost surface of the substrate contact is coplanar with an uppermost surface of the island.
14. The structure of claim 13 , wherein:
an uppermost surface of the doped region is coplanar with an uppermost surface of the island; and
a lowermost surface of the doped region is coplanar with a lowermost surface of the island.
15. The structure of claim 3 , wherein:
a first lateral side of the doped region directly contacts a shallow trench isolation structure; and
a second lateral side of the doped region, opposite the first lateral side, directly contacts a source region of the transistor.
16. The structure of claim 1 , further comprising a nitride blocking element on an upper surface of the substrate contact, an upper surface of the doped portion, and an upper surface of a source/drain region of the transistor, wherein the nitride blocking element covers an entirety of an interface between the doped portion and the source/drain region of the transistor.
17. The structure of claim 1 , wherein an uppermost surface of the substrate contact is coplanar with an uppermost surface of the island.
18. A semiconductor structure, comprising:
a substrate;
a buried insulator layer on the substrate;
an island of a semiconductor layer on the buried insulator layer;
a substrate contact extending from a first area of the island to the substrate through the buried insulator layer; and
a transistor in a second area of the island,
wherein the substrate contact has a thermal conductivity that is greater than a thermal conductivity of the buried insulator layer;
the substrate, the island, and the substrate contact are all composed of silicon and form a continuous silicon path extending from a channel of the transistor to the substrate;
the substrate contact is electrically isolated from the transistor;
an uppermost surface of the substrate contact is coplanar with an uppermost surface of the island;
a doped portion of the island electrically isolates the substrate contact from the transistor;
an uppermost surface of the doped portion is coplanar with an uppermost surface of the island; and
a lowermost surface of the doped portion is coplanar with a lowermost surface of the island.
19. The structure of claim 18 , wherein:
a first lateral side of the doped portion directly contacts a shallow trench isolation structure; and
a second lateral side of the doped portion, opposite the first lateral side, directly contacts the source region of the transistor.