Patent Application
Provisional
App. No. 60/857,467
· Confirmation No. 4164
PVT compensated dynamic auto-calibration scheme for simplifying high performance DDR3 memory interface design in FPGAs
Provisional Application Expired
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2006-11-20 | APP.FILE.REC |
Filing Receipt | 3 | View | |
| 2006-11-06 | TRNA |
Transmittal of New Application | 3 | View | |
| 2006-11-06 | SPEC |
Specification | 13 | View | |
| 2006-11-06 | CLM |
Claims | 1 | View | |
| 2006-11-06 | ABST |
Abstract | 1 | View | |
| 2006-11-06 | WFEE |
Fee Worksheet (SB06) | 1 | View | |
| 2006-11-06 | ADS |
Application Data Sheet | 5 | View |
Inventors
Manoj B. Roge
San Jose, CA
Andrew Bellis
Surrey, UNITED KINGDOM
Philip Clarke
Leatherhead, UNITED KINGDOM
Joseph Huang
Morgan Hill, CA
Michael H. Chu
Fremont, CA
Yan Chong
San Jose, CA
Attorneys & Agents of Record
Prosecution
- Customer No.
- 26059
- Docket No.
- 015114-085500US
- Confirmation No.
- 4164
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Quick Facts
- App. No.
- 60/857,467
- Filed
- 2006-11-06
External Links