IP Library Patent Application 60857467
Patent Application Provisional
App. No. 60/857,467 · Confirmation No. 4164

PVT compensated dynamic auto-calibration scheme for simplifying high performance DDR3 memory interface design in FPGAs

Provisional Application Expired
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Code Description Pages PDF
2006-11-20 APP.FILE.REC Filing Receipt 3 View
2006-11-06 TRNA Transmittal of New Application 3 View
2006-11-06 SPEC Specification 13 View
2006-11-06 CLM Claims 1 View
2006-11-06 ABST Abstract 1 View
2006-11-06 WFEE Fee Worksheet (SB06) 1 View
2006-11-06 ADS Application Data Sheet 5 View
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Quick Facts
App. No.
60/857,467
Filed
2006-11-06