IP Library Granted Patent US 6,848,015
Granted Patent B2
US 6,848,015 · App. 09/998,514 · Granted Jan 25, 2005

Arbitration technique based on processor task priority

Assignee: Hewlett-Packard Development Company, L.P.
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Quick Facts
Patent No.
US 6,848,015
App. No.
09/998,514
Filed
Nov 30, 2001
Granted
Jan 25, 2005
Kind
B2
Art Unit
2111
USPC
710/311
Abstract

A computer system including multiple CPUs inform other logic in a computer system as to the priority level (e.g., task priority) associated with the CPU or software executing thereon. The logic makes arbitration decisions regarding CPU transactions based, at least in part, on the task priorities of the various CPUs. The logic that implements this technique may be a host bridge within a computer system having multiple CPUs or in a switch or router that interconnects multiple nodes or computer systems.

Claims (48)

1. A computer system, comprising:

a host bridge;

a plurality of CPUs coupled to said host bridge;

a system resource coupled to said host bridge; and

wherein said host bridge includes storage for CPU task priorities, each CPU being capable of informing the host bridge of its task priority, and said host bridge uses said task priorities to decide how to allocate said system resource to a CPU from among a plurality of the CPUs that request access to said system resource.

2. The computer system of claim 1 wherein said storage in said host bridge includes a table in which said host bridge stores said task priorities.

3. The computer system of claim 2 wherein said table includes an entry for each of said CPUs, a task priority for a CPU being stored in the entry corresponding to that CPU.

4. The computer system of claim 1 wherein each of said CPUs transmits its task priority to said host bridge via a cycle on a bus interconnecting said CPU and said host bridge.

5. The computer system of claim 4 wherein said cycle also includes a request by the CPU for access to said system resource.

6. The computer system of claim 4 wherein said cycle is separate from a cycle in which said CPUs request access to said system resource.

7. The computer system of claim 1 wherein said system resource comprises memory.

8. The computer system of claim 1 wherein said system resource includes a peripheral device coupled to said host bridge.

9. The computer system of claim 1 wherein said host bridge uses said task priorities as the sole criterion for deciding how to allocate said system resource.

10. The computer system of claim 1 wherein said host bridge decides how to allocate said system resource based on said task priorities and based on an anti-starvation algorithm.

11. The computer system of claim 1 wherein said host bridge decides how to allocate said system resource based on said task priorities and based on a tie breaking algorithm that is used when two or more CPUs have the highest, yet equal, task priority.

12. The computer system of claim 1 wherein said host bridge decides how to allocate said system resource based on an algorithm that does not involve said task priorities, but uses said task priorities to decide the resource allocation when the non task priority-based algorithm is unable to decide between competing CPU requests for the system resource.

13. The computer system of claim 1 wherein said host bridge decides how to allocate said system resource based on said task priorities and based on other criteria.

14. A method of arbitrating for access to system resources, comprising:

(a) receiving a plurality of cycle requests from a plurality of CPUs, each cycle request requesting access to a system resource on behalf of a CPU;

(b) receiving task priorities associated with each of said CPUs; and

(c) granting access to the system resource based, at least in part, on said task priorities.

15. The method of claim 14 wherein (c) includes using task priorities as the sole criterion for deciding how to grant access to a system resource.

16. The method of claim 14 wherein (c) includes using said task priorities and an anti-starvation algorithm to grant access to the system resource.

17. The method of claim 14 wherein (c) includes granting access also based on a tie breaking algorithm that is used when two CPUs have equal task priorities.

18. The method of claim 14 wherein (c) includes granting access based on an algorithm that initially does not involve said task priorities, but uses said task priorities when the non task priority-based algorithm is unable to how to grant access.

19. The method of claim 14 wherein (c) also includes granting access based on other criteria.

20. The method of claim 14 wherein said system resource includes memory.

21. The method of claim 14 wherein said system resource includes a CPU.

22. A system, comprising:

a bridge;

a plurality of CPUs coupled to said bridge; and

a system resource coupled to said bridge;

wherein each CPU is capable of informing the bridge of its task priority, and said bridge uses said task priorities when deciding how to allocate said system resource to said CPUs; and

wherein each of said CPUs Is capable of transmitting its task priority to said host bridge via a cycle on a bus interconnecting said CPU and said host bridge, said cycle also Includes a request by the CPU for access to said system resource.

23. The system of claim 22 wherein said bridge decides how to allocate said system resource based on said task priorities and based on an anti-starvation algorithm.

24. The system of claim 22 wherein said bridge decides how to allocate said system resource based on an algorithm that does not involve said task priorities, but uses said task priorities to decide the resource allocation when the non task priority-based algorithm is unable to decide between competing CPU requests for the system resource.

25. A system, comprising:

a bridge;

a plurality of CPUs coupled to said bridge;

a system resource coupled to said bridge; and

wherein each CPU is capable of informing the bridge of its task priority, and wherein said bridge decides how to allocate said system resource based on said task priorities and based on an anti-starvation algorithm.

26. The system of claim 25 wherein each of said CPUs is capable of transmitting its task priority to said bridge via a cycle, and said cycle also includes a request by the CPU for access to said system resource.

27. A system, comprising:

a bridge;

a plurality of CPUs coupled to said bridge;

a system resource coupled to said bridge: and

wherein each CPU is capable of informing the bridge of its task priority, and wherein said bridge decides how to allocate said system resource based on an algorithm that does not involve said task priorities, but uses said task priorities to decide the resource allocation when the non task priority-based algorithm is unable to decide between competing CPU requests for the system resource.

28. The system of claim 27 wherein each of said CPUs is capable of transmitting its task priority to said bridge via a cycle on a bus interconnecting said CPU and host bridge and said cycle also includes a request by the CPU for access to said system resource.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2004
From: JONES, PHILLIP M.
To: COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P.
Reel/Frame 015425/0144 →
CHANGE OF NAME Recorded May 12, 2004
From: COMPAQ INFORMATION TECHNOLOGIES GROUP LP
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 014628/0103 →
Continuity (1)
Related Publication 20030105911A1 · Jun 5, 2003