IP Library › Granted Patent US 6,873,665
Granted Patent B2
US 6,873,665 · App. 09/887,328 · Granted Mar 29, 2005

Digital magnetic recording/reproducing apparatus

Assignee: Hitachi, Ltd.
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Quick Facts
Patent No.
US 6,873,665
App. No.
09/887,328
Granted
Mar 29, 2005
Kind
B2
Abstract

A digital magnetic recording/reproducing apparatus includes an LVA (List Viterbi Algorithm) detector which produces first to nth best sequences (n>1) of a decoded result, and replaces a likelihood ratio and a path memory of the ith best sequence (i=2, 3, . . . , n) with those of the (2i−1)th best sequence when contents of path memories of the (i−1)th and ith best sequences are equal to each other and an absolute value of a difference between likelihood ratios of the (i−1)th and (2i−1)th best sequences is smaller than a decision threshold. Alternatively, the LVA detector initializes a likelihood ratio of the ith best sequence to be a likelihood ratio of the (i−1)th best sequence with a constant difference value added thereto when contents of path memories of the (i−1)th and ith best sequences are equal to each other.

Claims (33)

1. A digital magnetic recording/reproducing apparatus for recording and reproducing digital information comprising:

a Viterbi detector which decodes a signal sequence obtained by partial response equalization and produces n candidates of a decoded result, the candidates being a best candidate to an nth best candidate and being produced simultaneously by the Viterbi decoder;

an error detector which detects errors in the n candidates; and

an selector which selects from the candidates a candidate having no detected errors as a correct decoded result and supplies the correct decoded result to a recording decoder;

wherein the Viterbi decoder uses a path memory having a length which is shorter than a length of an error detection block used by the error detector.

2. A digital magnetic recording/reproducing apparatus according to claim 1 , wherein the length of the error detection block is selected so that a coding rate after error detection is not less than 8/9.

3. A digital magnetic recording/reproducing apparatus according to claim 1 , wherein the error detection block is a CRC (Cyclic Redundancy Check) block.

4. A digital magnetic recording/reproducing apparatus according to claim 1 , wherein the Viterbi detector uses an LVA (List Viterbi Algorithm) for signal processing.

5. A digital magnetic recording/reproducing apparatus according to claim 1 , further comprising a coder which adds error detection check bits to the signal sequence.

6. A digital magnetic recording/reproducing method for recording and reproducing digital information comprising the steps of:

decoding a signal sequence obtained by partial response equalization and producing n candidates of a decoded result using a Viterbi decoder, the candidates being a best candidate to an nth best candidate and being produced simultaneously by the Viterbi decoder;

detecting errors in the n candidates; and

selecting from the candidates a candidate having no detected errors as a correct decoded result and supplying the correct decoded result to a recording decoder;

wherein the Viterbi decoder uses a path memory having a length which is shorter than a length of an error detection block used in the error detecting step.

7. A digital magnetic recording/reproducing method according to claim 6 , wherein the length of the error detection block is selected so that a coding rate after error detection is not less than 8/9.

8. A digital magnetic recording/reproducing method according to claim 6 , wherein the error detection block is a CRC (Cyclic Redundancy Check) block.

9. A digital magnetic recording/reproducing method according to claim 6 , wherein the Viterbi detector uses an LVA (List Viterbi Algorithm) for signal processing.

10. A digital magnetic recording/reproducing method according to claim 6 , further comprising the step of adding error detection check bits to the signal sequence.

11. An apparatus for recording and reproducing digital information comprising:

a decoder which decodes a signal sequence and produces n candidates of a decoded result, each of the n candidates being divided into error detection blocks; and

a circuit which detects errors in the n candidates based on the error detection blocks, and selects a candidate having no errors from the n candidates as a correct decoded result,

wherein the decoder produces the n candidates using a path memory having a length which is shorter than a length of each of the error detection blocks.

12. An apparatus according to claim 11 , wherein the length of the error detection block is selected so that a coding rate after error detection is not less than 8/9.

13. An apparatus according to claim 11 , wherein the error detection blocks are CRC (Cyclic Redundancy Check) blocks.

14. An apparatus according to claim 11 , wherein the detector uses an LVA (List Viterbi Algorithm) for signal processing.

15. An apparatus according to claim 11 , further comprising a coder which adds error detection check bits to the signal sequence.

16. A method for recording and reproducing digital information in a digital magnetic recording/reproducing apparatus, the method comprising:

decoding a signal sequence and producing n candidates of a decoded result, each of the n candidates being divided into error detection blocks;

detecting errors in the n candidates based on the error detection blocks; and

selecting a candidate having no errors from the n candidates as a correct decoded result,

wherein the n candidates are produced using a path memory having a length which is shorter than a length of each of the error detection blocks.

17. A method according to claim 16 , wherein the length of the error detection block is selected so that a coding rate after error detection is not less than 8/9.

18. A method according to claim 16 , wherein the error detection blocks are CRC (Cyclic Redundancy Check) blocks.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2005
From: HITACHI, LTD.
To: HITACHI GLOBAL STORAGE TECHNOLOGIES JAPAN, LTD.
Reel/Frame 015642/0704 →
Priority Claims (1)
JP 09-301766 · Nov 4, 1997 · national
Continuity (2)
Continuation 0918509700 · Nov 3, 1998
Related Publication 20010036236A1 · Nov 1, 2001