IP Library › Granted Patent US 6,889,431
Granted Patent B2
US 6,889,431 · App. 10/078,448 · Granted May 10, 2005

Manufacturing method of electronic circuit including multilayer circuit board

Assignees: Hitachi, Ltd.; Hitachi Chemical Co., Ltd.
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Quick Facts
Patent No.
US 6,889,431
App. No.
10/078,448
Granted
May 10, 2005
Kind
B2
Abstract

The present invention provides a manufacturing method of an electronic circuit device including a multi-layer circuit board incorporated with a thin film capacitor small in size and of high performance capable of attaining higher capacitance value with a thin dielectric film of high dielectric constant and with favorable film quality. A first electrode layer and a thin film dielectric layer are laminated continuously in this order in one identical to laminate each of the layers on a leveled substrate in one identical chamber and then the first electrode layer is fabricated a conductor pattern.

Claims (12)

1. A manufacturing method of an electronic circuit device including a multi-layer circuit board, comprising: forming a capacitor element in which at least a first conductor layer, a dielectric layer and a second conductor layer are formed ally with a multi-layer circuit substrate, said forming the capacitor element comprising:

a step of forming the first conductor layer and the dielectric layer on the multi-layer circuit substrate, wherein the dielectric layer is an epitaxial dielectric layer and the multi-layer circuit substrate is an organic polymeric resin circuit substrate, and the epitaxial dielectric lever is deposited on the first conductor lever without exposing the first conductor layer to atmospheric oxygen between forming the first conductor layer and depositing the epitaxial dielectric layer;

a step of fabricating the epitaxial dielectric layer into a desired shape;

a step of fabricating the first conductor layer into a desired shape; and

a step of forming the second conductor layer on the epitaxial dielectric layer.

2. A manufacturing method of an electronic circuit device including a multi-layer circuit board according to claim 1 , wherein the step of forming the first conductor layer and the epitaxial dielectric layer is conducted by forming the first conductor layer and the epitaxial dielectric layer on the multi-layer circuit substrate within a single chamber without opening the chamber between deposition the first conductor layer and depositing the epitaxial dielectric layer.

3. A manufacturing method of an electronic circuit device including a multi-layer circuit board according to claim 1 , wherein a layer for enhancing adhesion between the multi-layer circuit substrate and the first conductor layer is formed between the multi-layer circuit substrate and the first conductor layer on the multi-layer circuit substrate and then the first conductor layer and the epitaxial dielectric layer are formed without exposing the first conductor layer to atmospheric oxygen before the epitaxial dielectric layer is deposited thereon.

4. A manufacturing method of an electronic circuit device including a multi-layer circuit board according to claim 1 , wherein a layer for enhancing adhesion between the epitaxial dielectric layer and the second conductor layer is formed between the epitaxial dielectric layer and the second conductor layer on the epitaxial dielectric layer, and then the second conductor layer is formed.

5. A manufacturing method of an electronic circuit device including a multi-layer circuit board according to claim 1 , wherein the multi-layer circuit substrate has a layer thereon for leveling the surface thereof.

6. A manufacturing method of an electronic circuit device including a multi-layer circuit board according to claim 5 , wherein the layer for leveling the surface of the multi-layer circuit substrate is an organic polymeric resin layer.

7. A manufacturing method of an electronic circuit device including a multi-layer circuit board according to claim 1 , wherein the first electrode layer is comprised of at least one member selected from the group consisting of Ru, Pt and Pd.

8. A manufacturing method of an electronic circuit device including a multi-layer circuit board according to claim 1 , wherein the epitaxial dielectric layer is a perovskite type oxide thin epitaxial dielectric film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2005
From: HITACHI CHEMICAL CO., LTD.
To: HITACHI, LTD.
Reel/Frame 016800/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2002
From: OKABE, HIROSHI; YAMADA, HIROZI; TAKEDA, ERIKO; YAMAMOTO, KAZUNORI; KURIYA, HIROYUKI; YAMAGUCHI, MASANORI; OTSUKA, KAZUHISA; HIRATA, YOSHITAKA; SHIMADA, YASUSHI
To: HITACHI, LTD.; HITACHI CHEMICAL CO., LTD.
Reel/Frame 012743/0993 →
Priority Claims (1)
JP 2001-358836 · Nov 26, 2001 · national
Continuity (1)
Related Publication 20030097750A1 · May 29, 2003