Ferrodielectric non-volatile semiconductor memory
A ferroelectric-type nonvolatile semiconductor memory comprising a bit line BL, a transistor for selection TR, a memory unit MU composed of memory cells MC M that are M in number (M≧2), and plate lines PL M that are M in number, in which each memory cell comprises a first electrode 21 , a ferroelectric layer 22 and a second electrode 23 ; in the memory unit MU, the first electrodes 21 of the memory cells MC M are in common, and said common first electrode 21 is connected to the bit line BL through the transistor for selection TR; in the memory unit MU, the second electrode 23 of the m-th-place memory cell is connected to the m-th-place plate line PL m ; and said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit TR S for short-circuiting the plate lines PL M that are M in number and the common first electrode 21.
1. A ferroelectric-type nonvolatile semiconductor memory comprising;
(A) a bit line,
(B) a transistor for selection,
(C) a memory unit composed of memory cells that are M in number (M≧2), and
(D) plate lines that are M in number,
wherein each memory cell comprises a first electrode, a ferroelectric layer and a second electrode,
in the memory unit, the first electrodes of the memory cells are in common, and said common first electrode is connected to the bit line through the transistor for selection,
in the memory unit, the second electrode of the m-th-place (m=1, 2 . . . , M) memory cell is connected to the m-th-place plate line, and
said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit, connected at one end to the common first electrode, for grounding the common first electrode or for short-circuiting the plate lines that are M in number and the common first electrode.
2. The ferroelectric-type nonvolatile semiconductor memory according to claim 1 , wherein said circuit is comprised of a transistor for switching.
3. The ferroelectric-type nonvolatile semiconductor memory according to claim 1 , wherein said circuit is comprised of a high-resistance element.
4. The ferroelectric-type nonvolatile semiconductor memory according to claim 3 , wherein said high-resistance element has a resistance value of 1×10 6 Ω to 1×10 12 Ω.
5. A ferroelectric-type nonvolatile semiconductor memory comprising;
(A) a bit line,
(B) a transistor for selection,
(C) memory units that are N in number (N≧2), each memory unit being composed of memory cells that are M in number (M≧2), and
(D) plate lines that are M×N in number,
wherein the memory units that are N in number are stacked one over another with an insulating layer therebetween,
each memory cell comprises a first electrode, a ferroelectric layer and a second electrode,
in each memory unit, the first electrodes of the memory cells are in common, and said common first electrode is connected to the transistor for selection through the bit line,
in the memory unit positioned as an n-th (n=1, 2 . . . , N) layer, the second electrode of the m-th-place (m=1, 2 . . . , M) memory cell is connected to the [(n−1)M+m]-th-place plate line, and
said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit, connected at one end to the common first electrode, for grounding the common first electrode or for short-circuiting the plate lines that are M×N in number and the common first electrode.
6. The ferroelectric-type nonvolatile semiconductor memory according to claim 5 , wherein said circuit is comprised of a transistor for switching.
7. The ferroelectric-type nonvolatile semiconductor memory according to claim 5 , wherein said circuit is comprised of a high-resistance element.
8. The ferroelectric-type nonvolatile semiconductor memory according to claim 7 , wherein said high-resistance element has a resistance value of 1×10 6 Ω to 1×10 12 Ω.
9. A ferroelectric-type nonvolatile semiconductor memory comprising;
(A) a bit line,
(B) transistors for selection that are N in number (N≧2),
(C) memory units that are N in number, each memory unit being composed of memory cells that are M in number (M≧2), and
(D) plate lines that are M in number,
wherein each memory cell comprises a first electrode, a ferroelectric layer and a second electrode,
in each memory unit, the first electrodes of the memory cells are in common,
in the n-th-place (n=1, 2 . . . , N) memory unit, said common first electrode is connected to the bit line through the n-th-place transistor for selection,
in the n-th-place memory unit, the second electrode of the m-th-place (m=1, 2 . . . , M) memory cell is connected to the m-th-place plate line common to the memory units, and
said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit, connected at one end to the common first electrode, for grounding the common first electrode or for short-circuiting the plate lines that are M in number and the common first electrode.
10. The ferroelectric-type nonvolatile semiconductor memory according to claim 9 , wherein said circuit is comprised of a transistor for switching.
11. The ferroelectric-type nonvolatile semiconductor memory according to claim 9 , wherein said circuit is comprised of a high-resistance element.
12. The ferroelectric-type nonvolatile semiconductor memory according to claim 11 , in which said high-resistance element has a resistance value of 1×10 6 Ω to 1×10 12 Ω.
13. A ferroelectric-type nonvolatile semiconductor memory comprising;
(A) bit lines that are N in number (N≧2),
(B) transistors for selection that are N in number,
(C) memory units that are N in number, each memory unit being composed of memory cells that are M in number (M≧2), and
(D) plate lines that are M in number,
wherein each memory cell comprises a first electrode, a ferroelectric layer and a second electrode,
in each memory unit, the first electrodes of the memory cells are in common,
said common first electrode in the n-th-place (n=1, 2 . . . , N) memory unit is connected to the n-th-place bit line through the n-th-place transistor for selection,
in the n-th-place memory unit, the second electrode of the m-th-place (m=1, 2 . . . , M) memory cell is connected to the m-th-place plate line common to the memory units, and
said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit, connected at one end to the common first electrode, for grounding the common first electrode or for short-circuiting the plate lines that are M in number and the common first electrode.
14. The ferroelectric-type nonvolatile semiconductor memory according to claim 13 , wherein said circuit is comprised of a transistor for switching.
15. The ferroelectric-type nonvolatile semiconductor memory according to claim 13 , wherein said circuit is comprised of a high-resistance element.
16. The ferroelectric-type nonvolatile semiconductor memory according to claim 15 , wherein said high-resistance element has a resistance value of 1×10 6 Ω to 1×10 12 Ω.
17. A ferroelectric-type nonvolatile semiconductor memory comprising;
(A) a bit line,
(B) a transistor for selection,
(C) a memory unit composed of memory cells that are M in number (M≧2), and
(D) plate lines that are M in number,
wherein each memory cell comprises a first electrode, a ferroelectric layer and a second electrode,
in the memory unit, the first electrodes of the memory cells are in common, and said common first electrode is connected to the bit line through the transistor for selection,
in the memory unit, the second electrode of the m-th-place (m=1, 2 . . . , M) memory cell is connected to the m-th-place plate line, and
said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit for grounding the common first electrode, or for short-circuiting the plate lines that are M in number and the common first electrode, while the memory unit is in a state of non-selection.
18. The ferroelectric-type nonvolatile semiconductor memory according to claim 17 , wherein said circuit is comprised of a transistor for switching.
19. The ferroelectric-type nonvolatile semiconductor memory according to claim 17 , wherein said circuit is comprised of a high-resistance element.
20. The ferroelectric-type nonvolatile semiconductor memory according to claim 19 , in which said high-resistance element has a resistance value of 1×10 6 Ω to 1×10 12 Ω.
21. A ferroelectric-type nonvolatile semiconductor memory comprising;
(A) a bit line,
(B) a transistor for selection,
(C) memory units that are N in number (N≧2), each memory unit being composed of memory cells that are M in number (M≧2), and
(D) plate lines that are M×N in number,
wherein the memory units that are N in number are stacked one over another with an insulating layer therebetween,
each memory cell comprises a first electrode, a ferroelectric layer and a second electrode,
in each memory unit, the first electrodes of the memory cells are in common, and said common first electrode is connected to the transistor for selection through the bit line,
in the memory unit positioned as an n-th (n=1, 2 . . . , N) layer, the second electrode of the m-th-place (m=1, 2 . . . , M) memory cell is connected to the [(n−1)M+m]-th-place plate line, and
said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit for grounding the common first electrode, or for short-circuiting the plate lines that are M×N in number and the common first electrode, while the memory unit is in a state of non-selection.
22. The ferroelectric-type nonvolatile semiconductor memory according to claim 21 , wherein said circuit is comprised of a transistor for switching.
23. The ferroelectric-type nonvolatile semiconductor memory according to claim 21 , wherein said circuit is comprised of a high-resistance element.
24. The ferroelectric-type nonvolatile semiconductor memory according to claim 23 , wherein said high-resistance element has a resistance value of 1×10 6 Ω to 1×10 12 Ω.
25. A ferroelectric-type nonvolatile semiconductor memory comprising;
(A) a bit line,
(B) transistors for selection that are N in number (N≧2),
(C) memory units that are N in number, each memory unit being composed of memory cells that are M in number (M≧2), and
(D) plate lines that are M in number,
wherein each memory cell comprises a first electrode, a ferroelectric layer and a second electrode,
in each memory unit, the first electrodes of the memory cells are in common,
in the n-th-place (n=1, 2 . . . , N) memory unit, said common first electrode is connected to the bit line through the n-th-place transistor for selection,
in the n-th-place memory unit, the second electrode of the m-th-place (m=1, 2 . . . , M) memory cell is connected to the m-th-place plate line common to the memory units, and
said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit for grounding the common first electrode, or for short-circuiting the plate lines that are M in number and the common first electrode, while the memory unit is in a state of non-selection.
26. The ferroelectric-type nonvolatile semiconductor memory according to claim 25 , wherein said circuit is comprised of a transistor for switching.
27. The ferroelectric-type nonvolatile semiconductor memory according to claim 25 , wherein said circuit is comprised of a high-resistance element.
28. The ferroelectric-type nonvolatile semiconductor memory according to claim 27 , wherein said high-resistance element has a resistance value of 1×10 6 Ω to 1×10 12 Ω.
29. A ferroelectric-type nonvolatile semiconductor memory comprising;
(A) bit lines that are N in number (N≧2),
(B) transistors for selection that are N in number,
(C) memory units that are N in number, each memory unit being composed of memory cells that are M in number (M≧2), and
(D) plate lines that are M in number,
wherein each memory cell comprises a first electrode, a ferroelectric layer and a second electrode,
in each memory unit, the first electrodes of the memory cells are in common,
said common first electrode in the n-th-place (n=1, 2 . . . , N) memory unit is connected to the n-th-place bit line through the n-th-place transistor for selection,
in the n-th-place memory unit, the second electrode of the m-th-place (m=1, 2 . . . , M) memory cell is connected to the m-th-place plate line common to the memory units, and
said ferroelectric-type nonvolatile semiconductor memory further comprises a circuit for grounding the common first electrode, or for short-circuiting the plate lines that are M in number and the common first electrode, while the memory unit is in a state of non-selection.
30. The ferroelectric-type nonvolatile semiconductor memory according to claim 29 , wherein said circuit is comprised of a transistor for switching.
31. The ferroelectric-type nonvolatile semiconductor memory according to claim 29 , wherein said circuit is comprised of a high-resistance element.
32. The ferroelectric-type nonvolatile semiconductor memory according to claim 31 , wherein said high-resistance element has a resistance value of 1×10 6 Ω to 1×10 12 Ω.