In-plane switching mode LCD device and method for fabricating the same
An In-Plane Switching (IPS) mode liquid crystal display device includes a first substrate, a plurality of gate lines on the first substrate along a first direction at a predetermined interval from each other, a plurality of data lines on the first substrate along a second direction substantially perpendicular to the first direction at a second predetermined interval from each other, a plurality of pixel regions defined by the crossing of the gate and data lines, a thin film transistor on the first substrate within each of the pixel regions, at least a common line on the first substrate parallel to the gate lines, a plurality of common electrodes connected to the common line within each of the pixel regions, a dummy data line on the first substrate substantially parallel to the data lines spaced apart from an outer most common electrode adjacent to a liquid crystal injection hole, and a plurality of pixel electrodes on the first substrate within each of the pixel regions, at least one of the pixel electrodes being connected to the thin film transistor.
1. An In-Plane Switching mode liquid crystal display device, comprising:
a first substrate;
a plurality of gate lines on the first substrate along a first direction at a predetermined interval from each other;
a plurality of data lines on the first substrate along a second direction substantially perpendicular to the first direction at a second predetermined interval from each other;
a plurality of pixel regions defined by the crossing of the gate and data lines;
a thin film transistor on the first substrate within each of the pixel regions;
at least a common line on the first substrate parallel to the gate lines;
a plurality of common electrodes connected to the common line within each of the pixel regions;
a dummy data line on the first substrate substantially parallel to the data lines spaced apart from an outer most common electrode adjacent to a liquid crystal injection hole; and
a plurality of pixel electrodes on the first substrate within each of the pixel regions, at least one of the pixel electrodes being connected to the thin film transistor.
wherein the dummy data line receives a voltage higher than another voltage applied to the common electrodes.
2. The device as claimed in claim 1 , wherein the common electrodes are bent at least once within each of the pixel regions.
3. The device as claimed in claim 2 , wherein the common electrodes are bent in a zigzag-like manner.
4. The device as claimed in claim 1 , wherein the data lines and the pixel electrodes are bent at least once within each of the pixel regions.
5. The device as claimed in claim 4 , wherein the data lines and the pixel electrodes are bent in a zigzag-like manner.
6. The device as claimed in claim 1 , wherein the common electrodes are symmetric with respect to the common line within each of the pixel regions.
7. The device as claimed in claim 1 , wherein the common line is on an outer side of the pixel regions.
8. The device as claimed in claim 1 , wherein the pixel electrodes extend to a portion on a gate line of an adjacent pixel region.
9. The device as claimed in claim 1 , wherein the pixel electrodes and the common electrodes interpose between each other within each of the pixel regions.
10. The device as claimed in claim 1 , wherein the dummy data line electrically connects to at least one of the data lines.
11. An In-Plane Switching mode liquid crystal display device, comprising:
a first substrate;
a plurality of gate lines on the first substrate along a first direction at a predetermined interval from each other;
a plurality of data lines on the first substrate along a second direction substantially perpendicular to the first direction at a second predetermined interval from each other;
a plurality of pixel regions defined by the crossing of the gate and data lines;
a thin film transistor on the first substrate within each of the pixel regions;
at least a common line on the first substrate parallel to the gate lines;
a plurality of common electrodes connected to the common line within each of the pixel regions;
a dummy data line on the first substrate substantially parallel to the data lines spaced apart from an outer most common electrode adjacent to a liquid crystal injection hole; and
a plurality of pixel electrodes on the first substrate within each of the pixel regions, at least one of the pixel electrodes being connected to the thin film transistor, wherein the dummy data line electrically connects to only one of the data lines that is second data line adjacent to the dummy data line.
12. An In-Plane Switching mode liquid crystal display device, comprising:
a substrate having an active region, a dummy region, and a pad region;
a plurality of gate lines on the substrate along a first direction at a predetermined interval from each other;
a plurality of data lines on the substrate along a second direction substantially perpendicular to the first direction at a second predetermined interval from each other;
a plurality of pixel regions within the active region defined by the crossing of the gate and data lines;
a plurality of pixel electrodes on the substrate within each of the pixel regions;
a plurality of common electrodes on the substrate within each of the pixel regions; and
a dummy data line in the dummy region parallel to the data lines, wherein the dummy data line connects to one of the data lines that is second data line adjacent to the dummy data line.
13. The device as claimed in claim 12 , wherein the active region includes a thin film transistor within each of the pixel regions.
14. The device as claimed in claim 12 , wherein the pad region includes:
a gate insulating film on the substrate;
n data lines on the gate insulating film and the dummy data line;
a passivation layer on the substrate including the n data lines and the dummy data line;
contact holes over the passivation layer to the (n−1) th data line and the dummy data line; and
a shorting bar over the passivation layer between the contact holes and connecting to the (n−1) th data line and th dummy data line.
15. The device as claimed in claim 12 , wherein the dummy region includes dummy thin film transistors, a dummy common line, dummy common electrodes, and dummy pixel electrodes.
16. The device as claimed in claim 12 , wherein the pixel electrodes and the common electrodes have zigzag forms.
17. The device as claimed in claim 12 , wherein the data lines have zigzag forms.
18. The device as claimed in claim 12 , wherein the pixel electrodes extends to a gate line of a previous pixel region.
19. A method for fabricating an in-plane switching mode liquid crystal display device, comprising:
forming a plurality of gate lines, a plurality of common lines, and a plurality of common electrodes on a substrate;
forming a gate insulating film on the substrate including the gate lines, the common lines, and the common electrodes;
forming a plurality of data lines and a dummy data line on the gate insulating film, the dummy data line being substantially parallel to the data lines and spaced apart from an outer most common electrode adjacent to a liquid crystal injection hole;
forming a passivation layer on the substrate including the data line and the dummy data line; and
forming pixel electrodes on the passivation layer, wherein the dummy data line receives a voltage higher than another voltage applied to the common electrodes.
20. A method for fabricating an in-plane switching mode liquid crystal display device, comprising:
forming a plurality of gate lines, a plurality of common lines, and a plurality of common electrodes on a substrate;
forming a gate insulating film on the substrate including the gate lines, the common lines, and the common electrodes;
forming a plurality of data lines and a dummy data line on the gate insulating film;
forming a passivation layer on the substrate including the data line and the dummy data line;
forming pixel electrodes on the passivation layer; and
forming a shorting bar connecting the dummy gate line to one of the data lines that is second immediately adjacent to the dummy data line.
21. The method as claimed in claim 20 , wherein the shorting bar is formed on a same layer of the substrate as the pixel electrodes.
22. The method as claimed in claim 20 , wherein the shorting bar is formed of a same material as the pixel electrodes.
23. The method as claimed in claim 19 , wherein the common electrodes, the data lines and the dummy data line are formed bent at least once in a zigzag form.
24. The method as claimed in claim 19 , wherein the pixel electrodes interpose between the common electrodes.
25. The method as claimed in claim 18 , wherein the passivation layer is formed one of acryl, polyimide, BCB (Benzo Cyclo Butene), oxide, and nitride.
26. The method as claimed in claim 18 , wherein the gate lines, the common lines, and the common electrodes are formed of a material including one of Al, Cr, Mo, and W.