Digital architecture for radio-frequency apparatus and associated methods
A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.
1. A receiver digital circuitry, comprising:
digital down-converter circuitry configured to mix a digital input signal provided by a receiver analog circuitry with an intermediate frequency (IF) local oscillator signal to generate a digital down-converted signal; and
digital filter circuitry configured to filter the digital down-converted signal to generate a filtered digital signal,
wherein the receiver analog circuitry resides within a first integrated circuit, and
wherein the receiver digital circuitry resides within a second integrated circuit, and the second integrated circuit couples to the first integrated circuit via a one-bit digital interface.
2. The receiver digital circuitry of claim 1 , wherein the digital filter circuitry comprises a channelization filter circuitry.
3. The receiver digital circuitry of claim 2 , wherein the digital input signal comprises a digital in-phase signal and a digital quadrature signal.
4. The receiver digital circuitry of claim 3 , wherein the channelization filter circuitry comprises a cascade coupling of a cascade integrator/comb (CIC) filter circuitry and a secondary filter circuitry.
5. The receiver digital circuitry of claim 4 , wherein the cascade integrator/comb filter circuitry comprises a cascade coupling of an integrator chain circuitry, a decimator circuitry, and a differentiator chain circuitry.
6. The receiver digital circuitry of claim 5 , wherein the channelization filter circuitry provides a notch at minus a frequency of the intermediate frequency local oscillator signal.
7. The receiver digital circuitry of claim 6 , wherein the secondary filter circuitry includes a cascade coupling of a notch circuitry and at least one biquad filter circuitry.
8. The receiver digital circuitry of claim 7 , wherein the notch filter circuitry provides the notch at minus the frequency of the intermediate frequency local oscillator signal.
9. The receiver digital circuitry of claim 8 , wherein the intermediate frequency local oscillator signal comprises a digital signal.
10. The receiver digital circuitry of claim 9 , used within a radio-frequency transceiver circuitry.
11. The receiver digital circuitry of claim 9 , further comprising a digital programmable gain amplifier circuitry configured to provide a programmable gain applied to the filtered digital signal to produce a digital scaled signal.
12. The receiver digital circuitry of claim 11 , further comprising a digital-to-analog converter circuitry coupled to the digital programmable gain amplifier circuitry, the digital-to-analog converter circuitry configured to convert the digital scaled signal to an analog output signal.
13. The receiver digital circuitry of claim 12 , wherein the digital-to-analog circuitry is further configured to provide the analog output signal to a baseband processor circuitry coupled to the receiver digital circuitry.
14. The receiver digital circuitry of claim 13 used within a radio-frequency transceiver circuitry.
15. A receiver digital circuitry, comprising:
digital filter circuitry configured to filter a digital input signal provided by a receiver analog circuitry to generate a filtered digital signal; and
digital down-converter circuitry configured to mix the filtered digital signal with an intermediate frequency (IF) local oscillator signal to generate a digital down-converted signal; and
wherein the receiver analog circuitry resides within a first integrated circuit, and
wherein the receiver digital circuitry resides within a second integrated circuit, and the second integrated circuit couples to the first integrated circuit via a one-bit digital interface.
16. The receiver digital circuitry of claim 15 , wherein the digital filter circuitry comprises a channelization filter circuitry.
17. The receiver digital circuitry of claim 16 , wherein the digital input signal comprises a digital in-phase signal and a digital quadrature signal.
18. The receiver digital circuitry of claim 17 , wherein the channelization filter circuitry comprises a cascade coupling of a cascade integrator/comb (CIC) filter circuitry and a secondary filter circuitry.
19. The receiver digital circuitry of claim 18 , wherein the cascade integrator/comb filter circuitry comprises a cascade coupling of an integrator chain circuitry, a decimator circuitry, and a differentiator chain circuitry.
20. The receiver digital circuitry of claim 19 , wherein the channelization filter circuitry provides a notch at zero frequency.
21. The receiver digital circuitry of claim 20 , wherein the secondary filter circuitry includes a cascade coupling of a notch circuitry and at least one biquad filter circuitry.
22. The receiver digital circuitry of claim 21 , wherein the notch filter circuitry provides the notch at zero frequency.
23. The receiver digital circuitry of claim 22 , wherein the intermediate frequency local oscillator signal comprises a digital signal.
24. The receiver digital circuitry of claim 23 , used within a radio-frequency transceiver circuitry.
25. The receiver digital circuitry of claim 23 , further comprising a digital programmable gain amplifier circuitry configured to provide a programmable gain applied to the digital down-converted signal to produce a digital scaled signal.
26. The receiver digital circuitry of claim 25 , further comprising a digital-to-analog converter circuitry coupled to the digital programmable gain amplifier circuitry, the digital-to-analog converter circuitry configured to convert the digital scaled signal to an analog output signal.
27. The receiver digital circuitry of claim 26 , wherein the digital-to-analog circuitry is further configured to provide the analog output signal to a baseband processor circuitry coupled to the receiver digital circuitry.
28. The receiver digital circuitry of claim 27 , used within a radio-frequency transceiver circuitry.
29. The receiver digital circuitry of claim 23 , further comprising a digital programmable gain amplifier coupled between the digital filter circuitry and the digital down-converter circuitry, the digital programmable gain amplifier circuitry configured to apply programmable gain to the digital filtered signal to produce a digital scaled signal, the digital programmable gain amplifier circuitry further configured to provide the digital scaled signal to the digital down-converter circuitry.
30. The receiver digital circuitry of claim 29 , further comprising a digital-to-analog converter circuitry coupled to the digital down-converter circuitry, the digital-to-analog converter circuitry configured to convert the digital down-converted signal to an analog output signal.
31. The receiver digital circuitry of claim 30 , wherein the digital-to-analog circuitry is further configured to provide the analog output signal to a baseband processor circuitry coupled to the receiver digital circuitry.
32. The receiver digital circuitry of claim 31 , used within a radio-frequency transceiver circuitry.