IP Library › Granted Patent US 6,992,010
Granted Patent B2
US 6,992,010 · App. 10/248,871 · Granted Jan 31, 2006

Gate structure and method of manufacture

Assignee: Winbond Electronics Corp.
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Quick Facts
Patent No.
US 6,992,010
App. No.
10/248,871
Granted
Jan 31, 2006
Kind
B2
Abstract

A method of forming a gate structure. A gate oxide layer, a polysilicon layer, a metallic layer and an insulation layer are sequentially formed over a substrate. Using a definite height level to be an etching end point, the insulation layer, the metallic layer and the polysilicon layer are patterned to form a stack structure. A barrier layer is formed over the stack structure. An etching operation is conducted to form a first spacer covering a portion of each sidewall of the stack structure. The etching operation is continued to remove the polysilicon layer outside the first spacer until the gate oxide layer is exposed. A portion of the exposed polysilicon layer on the sidewalls of the stack structure is removed so that a recess structure is formed. A re-oxidation process is conducted to form a re-oxidation layer within the recess structure. A second spacer is formed over the first spacer and the re-oxidation layer.

Claims (15)

1. A method of forming a gate structure, comprising the steps of:

providing a substrate;

sequentially forming a gate oxide layer, a polysilicon layer, a metallic layer and an insulation layer over the substrate;

patterning the insulation layer, the metallic layer and the polysilicon layer to form a stack structure using a set height level of the polysilicon layer as an etching end point;

forming a barrier layer over the stack structure;

conducting an etching operation to remove a portion of the sidewalls of the gate structure and form first spacers, continuing the etching operation to remove the polysilicon layer outside the first spacers until the gate oxide layer and the polysilicon layer on the sidewalls of the stack structure are exposed;

removing a portion of the exposed polysilicon layer on the sidewalls of the stack structure to form a recess structure;

conducting a re-oxidation process to form a re-oxidation layer inside the recess structure; and

forming second spacers over the first spacers and the re-oxidation layer.

2. The method of claim 1 , wherein the step of forming the recess structure includes conducting an isotropic dry etching.

3. The method of claim 1 , wherein the step of forming the recess structure includes wet etching.

4. The method of claim 1 , wherein the step of forming the metallic layer includes forming a barrier metallic layer and a refractory metallic layer in sequence.

5. The method of claim 4 , wherein material constituting the refractory metallic layer includes tungsten.

6. The method of claim 4 , wherein material constituting the barrier metallic layer is selected from a group consisting of titanium nitride and tungsten nitride.

7. The method of claim 1 , wherein material constituting the first spacers and the second spacers is selected from a group consisting of silicon nitride, silicon boron nitride and silicon oxynitride.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2003
From: FINK, RONALD G.; ELLIS, WALTER B.
To: RGF O3 SYSTEMS, INC
Reel/Frame 014003/0210 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2003
From: CHOU, PAO-HAW; INOUE, FUMIHIKO; TOSHIRO, NAKANISHI; OZAWA, YOSHIO
To: WINBOND ELECTRONICS CORP,
Reel/Frame 013442/0695 →
Priority Claims (1)
TW 91112174 A · Jun 6, 2002 · national
Continuity (1)
Related Publication 20030228766A1 · Dec 11, 2003