Fast and adaptive packet processing device and method using digest information of input packet
A packet processing device is formed by a digest information generation unit configured to extract a plurality of prescribed bit sequences from an input packet, and generate a digest information capable of specifying at least a part of a processing to be applied to the input packet, according to values of the plurality of prescribed bit sequences; and a packet processing unit configured to process the input packet using an instruction sequence to be applied to the input packet that is obtained according to the digest information generated by the digest information generation unit, where the digest information generation unit generates the digest information with respect to a next input packet while the packet processing unit carries out a processing for one packet.
1. A packet processing method in a packet processing device comprising:
extracting a plurality of prescribed bit sequences from an input packet, and generating a digest information capable of specifying at least a part of processing to be applied to the input packet, according to values of the plurality of prescribed bit sequences; and
processing the input packet using an instruction sequence to be applied to the input packet that is obtained according to the digest information generated by the extracting step;
wherein the extracting step generates the digest information with respect to a next input packet while the processing step carries out a processing for one packet; and
the processing step includes:
carrying out a pipeline processing of micro instruction sequences;
storing a plurality of micro instruction sequences corresponding to a plurality of digest information, in an instruction sequence table; and
giving a micro instruction sequence selected from the instruction sequence table according to the digest information generated by the extracting step, to the carrying out step.
2. The packet processing method of claim 1 , wherein the carrying out step is capable of executing an instruction sequence selected from the instruction sequence table and an instruction sequence written in a main memory for carrying out a processing other than a processing with respect to the input packet, alternately.
3. A packet processing method in a packet processing device, comprising:
extracting a plurality of prescribed bit sequences from an input packet, and generating a digest information capable of specifying at least a part of a processing to be applied to the input packet, according to values of the plurality of prescribed bit sequences; and
processing the input packet using an instruction sequence to be applied to the input packet that is obtained according to the digest information generated by the extracting step;
wherein the extracting step generates the digest information with respect to a next input packet while the processing step carries out a processing for one packet; and
the processing step includes:
carrying out a pipeline processing of micro instruction sequences;
storing a plurality of macro instruction sequences corresponding to a plurality of digest information, in an instruction sequence table;
converting a macro instruction sequence selected from the instruction sequence table according to the digest information generated by the extracting step, into micro instructions; and
giving the micro instructions obtained by the converting step to the carrying out step.
4. The packet processing method of claim 3 , wherein the carrying out step is capable of executing an instruction sequence selected from the instruction sequence table and an instruction sequence written in a main memory for carrying out a processing other than a processing with respect to the input packet, alternately.
5. A packet processing method in a packet processing device, comprising:
extracting a plurality of prescribed bit sequences from an input packet, and generating a digest information capable of specifying at least a part of a processing to be applied to the input packet, according to values of the plurality of prescribed bit sequences; and
processing the input packet using an instruction sequence to be applied to the input packet that is obtained according to the digest information generated by the extracting step;
wherein the extracting step generates the digest information with respect to a next input packet while the processing step carries out a processing for one packet;
the extracting step also extracts parameters for a processing of the input packet from the input packet and gives the parameters along with the digest information to the processing step; and
the processing step includes:
carrying out a pipeline processing of micro instruction sequences;
storing a plurality of macro instruction sequences corresponding to a plurality of digest information, in an instruction sequence table;
converting a macro instruction sequence selected from the instruction sequence table according to the digest information generated by the extracting step, into micro instructions, while accounting for the parameters; and
giving the micro instructions obtained by the converting step to the carrying out step.
6. The packet processing method of claim 5 , wherein the carrying out step is capable of executing an instruction sequence selected from the instruction sequence table and an instruction sequence written in a main memory for carrying out a processing other than a processing with respect to the input packet, alternately.