IP Library › Granted Patent US 7,034,600
Granted Patent B2
US 7,034,600 · App. 10/419,594 · Granted Apr 25, 2006

Method and apparatus for EMC-optimized actuation of a semiconductor switching element

Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 7,034,600
App. No.
10/419,594
Granted
Apr 25, 2006
Kind
B2
Abstract

A semiconductor switching element has a control connection and a load path, with the load path connected in series with a load and a supply voltage is applied across the series circuit. The semiconductor switching element is actuated by providing a first charging current at the control connection, and providing a second charging current at the first control connection, which is greater than the first charging current, when a voltage which is applied across the load path is less than a first threshold value, with the threshold value being between 20% and 80% of the supply voltage.

Claims (28)

1. A method for actuating a semiconductor switching element having a control connection and a load path, the load path being connected in series with a load defining a series circuit and a supply voltage being applied across the series circuit, which comprises the following steps for switching on the semiconductor switching element:

providing a first charging current at the control connection; and

providing a second charging current at the control connection, being greater than the first charging current, when a voltage across the load path is less than a given threshold value, with the given threshold value being between 40% and 60% of the supply voltage.

2. The method according to claim 1 , which further comprises choosing the given threshold value in dependence on the load.

3. The method according to claim 1 , which further comprises before providing the first charging current, providing a third charging current until a current flowing through the load path of the semiconductor switching element falls below a given current threshold.

4. A method for actuating a semiconductor switching element having a control connection and a load path, the load path being connected in series with a load defining a series circuit and a supply voltage being applied across the series circuit, which comprises the following method steps for switching off the semiconductor switching element:

providing a first discharge current at the control connection;

providing a second discharge current at the control connection, being less than the first discharge current, when a voltage across the load path is greater than a given threshold value, with the given threshold value being between 40% and 60% of the supply voltage.

5. The method according to claim 4 , which further comprises choosing the given threshold value in dependence on the load.

6. The method according to claim 4 , which further comprises before providing the first discharge current, providing a third discharge current until a voltage dropped across the load path of the semiconductor switching element is greater than a further threshold value.

7. A circuit configuration, comprising:

a load;

a semiconductor switching element connected in series with said load defining a series circuit and having a control connection and a load path, said series circuit receiving a supply voltage; and

an actuating circuit, containing:

a first terminal for providing a first logic potential;

a second terminal for providing a second logic potential;

a first current source connected between said first terminal and said control connection;

a second current source connected between said first terminal and said control connection;

a third current source connected between said control connection and said second terminal;

a fourth current source connected between said control connection and said second terminal;

an actuating logic unit having outputs connected to and actuating said first, second, third and fourth current sources, said actuating logic unit having an input receiving a switching signal; and

a comparator configuration receiving a signal dependent on an output voltage across said load path of said semiconductor switching element and a reference signal having a value between 40% and 60% of the supply voltage, said comparator configuration having an output connected to said actuating logic unit and outputting a comparison signal received by said actuating logic unit, said actuating logic unit actuating said first, second, third and fourth current sources in dependence on the switching signal and the comparison signal.

8. The circuit configuration according to claim 7 , wherein said actuating circuit further contains:

a fifth current source connected between said first terminal and said control connection; and

a second comparator configuration receiving a signal that is dependent on a load current and a reference signal, said second comparator configuration outputting a second comparison signal, the second comparison signal being supplied to said actuating logic unit, and said actuating logic unit actuating said fifth current source in dependence on the switching signal and on the second comparison signal.

9. The circuit configuration according to claim 8 , wherein said actuating circuit further contains:

a sixth current source connected between said control connection and said second terminal; and

a third comparator configuration receiving a signal that is dependent on the output voltage and a further reference signal, said third comparator configuration outputting a third comparison signal and the third comparison signal being supplied to said actuating logic unit, and said actuating logic unit actuating said sixth current source in dependence on the switching signal and the third comparison signal.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS OF: INFINEON TECHNOLOGIES AG, ST.-MARTIN-STRASSE 53, D-81669 MUENCHEN, GERMANY. PREVIOUSLY RECORDED ON REEL 017173 FRAME 0641. ASSIGNOR(S) HEREBY CONFIRMS THE INFINEON TECHNOLOGIES AG, RIDLERSTRASSE 55, D-80339 MUENCHEN IS INCORRECT.. Recorded Mar 1, 2006
From: SCHEIKL, ERICH
To: INFINEON TECHNOLOGIES AG
Reel/Frame 017232/0378 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2006
From: SCHEIKL, ERICH
To: INFINEON TECHNOLOGIES AG
Reel/Frame 017173/0641 →
Priority Claims (1)
DE 102 17 611 · Apr 19, 2002 · national
Continuity (1)
Related Publication 20040021498A1 · Feb 5, 2004